Hi everyone, I’m working with Zynq7020 (ZC702 Board). I created a Vivado project where i generate interrupts from PL to PS. The following image shows that two debounced pushbuttons are connected to the line IRQ_F2P of Zynq7 Processing System. [image] I generated the bitstream, and created the pl…

Problem on pl to ps interrupt with freertos on vitis ide 2024.2

aggarg (Gaurav Aggarwal) March 30, 2026, 6:36am 2

This question is very Xilinx specific. Please reach out to Xilinx as well.

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