Hello Richard Barry,
thank you for your answer. I have just inspected both of the links you have sent me. Based on that I would say that:
Answer to my first question is Yes.
As far as my second question I think that the answer is also Yes. Unfortunately I don´t understand why I can ommit the Xil_ExceptioRegisterHandler and Xil_ExceptionEnable function calls. My understanding is that via these functions I configure the interrupt interface in the ARM Cortex A9 core. I have attempted to find where in the FreeRTOS port source code these functions are called and I haven´t found nothing. It is confusing for me because I expected that these functions have to be called somewhere. Please can you tell me how does it work? Thank you.
As far as my third question I have implemented the interrupt comming from the PL. Program execution jumps into associated interrupt service routine but in case I observe content of the spi_status_0 register (my interrupt has 61 ID) in debugger (memory address 0xF8F01D04) I see still only zeros.