Sorry I should have been more clear in my response. I think the cause is changing from macro to function call. The changes you are making seems right to me - you’ll need to follow up with the vendor to get these changes in their port.
aggarg
(Gaurav Aggarwal)
10
Related topics
| Topic | Replies | Views | Activity | |
|---|---|---|---|---|
| freeRTOS v10 on Arm-Cortex - R4F (TI TMS570ls12x) | 1 | 472 | November 24, 2018 | |
| FreeRTOS + TCP with hard FPU on Xilinx ZynqMP UltraScale CortexR5 | 12 | 1441 | November 9, 2022 | |
| Can I implement SMP with Cortex-R5F dual core in zynqultraScale+ mpsoc? | 26 | 5556 | April 12, 2023 | |
| FreeRTOS+TCP v4.0.0 performance degradation | 11 | 1125 | November 13, 2023 | |
| Updating FreeRTOS to newest vesion (9.0.0 to 10.4.6) | 10 | 1082 | November 19, 2021 |