Hi everyone,
I am having an issue running the AMD/Xilinx xdpdma_video_example.c with FreeRTOS on a Zynq UltraScale+ MPSoC.
Setup:
- AUP-ZU3 / XCZU3EG
- Vitis Unified 2025.2
- FreeRTOS
- PS DisplayPort + DPDMA
- SDT flow
The original example works correctly in bare-metal: DisplayPort link training succeeds and the video is displayed.
With FreeRTOS, however, the DisplayPort initialization and link training also succeed, but nothing is displayed.
The important point is that the XDpPsu interrupts work correctly, including the HPD-related interrupts. The application enters the XDpPsu interrupt handler and the DisplayPort link is trained successfully.
However, the DPDMA interrupt never reaches:
XDpDma_InterruptHandler()
The DPDMA interrupt setup functions return XST_SUCCESS, but after enabling the interrupt I read:
DPDMA IEN = 0x00000000
ISR = 0x00000000
IEN = 0x00000000
IMR = 0x07FFFFFF
So it seems that the DPDMA interrupt is either not being enabled at the peripheral level or is not reaching the GIC/ISR.
Since the XDpPsu interrupts work under the same FreeRTOS application, I suspect there may be something related to the FreeRTOS interrupt configuration or Cortex-A53 GIC integration.
Has anyone successfully used XDpDma_InterruptHandler() with FreeRTOS on Zynq UltraScale+?
Could FreeRTOS interrupt priorities, the IRQ/vector handling, or the way the Xilinx XScuGic interrupts are registered cause this behaviour?
Thanks!