Hi! I’m using FreeRTOS kernel V11.0.0. I’m testing with SMP in ARMv8-A ca53 aarch64 dual core. FreeRTOS-Kernel-Partner-Supported-Ports/blob/dc3afc6e837426b4bda81bbb6cf45bfb6f34c7e9/TI/CORTEX_A53_64-BIT_TI_AM64_SMP/portASM.S SMP is being tested in dual core by referring to the above code. I hav…

<a name="p-79562-when-the-processor-takes-an-exception-to-aarch64-execution-state-all-of-the-pstate-interrupt-masks-is-set-automatically-this-means-that-further-exceptions-are-disabled-if-software-is-to-support-nested-exceptions-for-example-to-allow-a-higher-priority-interrupt-to-interrupt-the-handling-of-a-lower-priority-source-then-software-needs-to-explicitly-re-enable-interrupts-1" class="anchor" href="#p-79562-when-the-processor-takes-an-exception-to-aarch64-execution-state-all-of-the-pstate-interrupt-masks-is-set-automatically-this-means-that-further-exceptions-are-disabled-if-software-is-to-support-nested-exceptions-for-example-to-allow-a-higher-priority-interrupt-to-interrupt-the-handling-of-a-lower-priority-source-then-software-needs-to-explicitly-re-enable-interrupts-1"> When the processor takes an exception to AArch64 execution state, all of the PSTATE interrupt masks is set automatically. This means that further exceptions are disabled. If software is to support nested exceptions, for example, to allow a higher priority interrupt to interrupt the handling of a …

[image] cwon: At a certain point, the ELR_EL3 value stored in the stack in the portSAVE_CONTEXT macro suddenly becomes 0x0. Therefore, the portRESTORE_CONTEXT marker generates an undef handler because the ELR_EL3 value is 0x0. One of the possible reason is stack memory corruption. Is there a…

To be precise, the ELR_EL3 value to be stored in the stack itself is 0x0… I wonder why ELR_EL3 value is 0x0. I have another question. Is it okay to jump directly to the IRQ handler because IRQ occurs during the SWI_Handler () function operation called through SMC instruction? Or should I go to I…

[image] cwon: Is it okay to jump directly to the IRQ handler because IRQ occurs during the SWI_Handler () function operation called through SMC instruction? Or should I go to IRQ handler after returning to task from SWI_Handler() and becoming IRQ enabled? Assuming it is the same issue as we …

is it okay to disable irq before vTaskSwitchContext in SWI_Handler()? Or I wonder if it is right to disable irq before entering SWI_Handler(). Does it work normally when IRQ is called before setting the LR value stored in the stack in SWI_Handler() to ELR_EL3 and then returns to SWI_handler?

Does it work normally when IRQ is called before setting the LR value stored in the stack in SWI_Handler() to ELR_EL3 and then returns to SWI_handler? please answer me…^^

[image] cwon: is it okay to disable irq before vTaskSwitchContext in SWI_Handler()? Or I wonder if it is right to disable irq before entering SWI_Handler(). I think my previous comment was not correct. Based on my reading so far, on Cortex-A, interrupts are disabled as soon as you take an ex…

[image] aggarg: I think my previous comment was not correct. Based on my reading so far, on Cortex-A, interrupts are disabled as soon as you take an exception and are not re-enabled unless explicitly enabled. Does that mean the interrupt will be disabled automatically when it goes into SWI_Ha…

[image] cwon: Does that mean the interrupt will be disabled automatically when it goes into SWI_Handler() exception?? I think so, yes. [image] cwon: All of these are problems caused by an interrupt occurring during FreeRTOS_SWI_Handler() operation and jumping to FreeRTOS_IRQ_Handler(). …

Thank you for sharing your solution.

Wrong ELR value in portSAVE_CONTEXT of SMP

Kernel

aggarg (Gaurav Aggarwal) May 9, 2024, 8:02am 4

Assuming it is the same issue as we are talking on this post, can you try my suggestion there?

Topic		Replies	Views
FreeRTOS A53 port : ELx stack pointers in save and restore context Kernel	3	236	December 11, 2016
Error when SMC instruction and IRQ are operated continuously in SMP code Kernel	3	258	May 9, 2024
ARM7 LPC2138 problem with portRESTORE_CONTEXT Kernel	10	289	February 20, 2008
Undertanding Context switch of ARM v7 Kernel	15	612	December 28, 2016
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Wrong ELR value in portSAVE_CONTEXT of SMP

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