Hi! I’m using FreeRTOS kernel V11.0.0. I’m testing with SMP in ARMv8-A ca53 aarch64 dual core. FreeRTOS-Kernel-Partner-Supported-Ports/blob/dc3afc6e837426b4bda81bbb6cf45bfb6f34c7e9/TI/CORTEX_A53_64-BIT_TI_AM64_SMP/portASM.S SMP is being tested in dual core by referring to the above code. I hav…

<a name="when-the-processor-takes-an-exception-to-aarch64-execution-state-all-of-the-pstate-interrupt-masks-is-set-automatically-this-means-that-further-exceptions-are-disabled-if-software-is-to-support-nested-exceptions-for-example-to-allow-a-higher-priority-interrupt-to-interrupt-the-handling-of-a-lower-priority-source-then-software-needs-to-explicitly-re-enable-interrupts-1" class="anchor" href="#when-the-processor-takes-an-exception-to-aarch64-execution-state-all-of-the-pstate-interrupt-masks-is-set-automatically-this-means-that-further-exceptions-are-disabled-if-software-is-to-support-nested-exceptions-for-example-to-allow-a-higher-priority-interrupt-to-interrupt-the-handling-of-a-lower-priority-source-then-software-needs-to-explicitly-re-enable-interrupts-1"> When the processor takes an exception to AArch64 execution state, all of the PSTATE interrupt masks is set automatically. This means that further exceptions are disabled. If software is to support nested exceptions, for example, to allow a higher priority interrupt to interrupt the handling of a …

Wrong ELR value in portSAVE_CONTEXT of SMP

Kernel

aggarg (Gaurav Aggarwal) May 9, 2024, 8:02am 4

Assuming it is the same issue as we are talking on this post, can you try my suggestion there?