Webserver STR91x with GCC: I need help!

fabtor wrote on Tuesday, October 03, 2006:

Hi, this message is for everyone that are working to porting webserver demo on STR91x using GCC.
This porting is a part of my thesis, and i must finish it within the month of November. Please i need some help. At this time i don’t understand if there are the startup file or the porting file that don’t work! When i compile the freertos .elf file and i load it into the board, the board it seems died! It is possible that i’m the only that is working to this porting? If there is someone that can help me, i can post my files here.
Thanks!

nobody wrote on Tuesday, October 03, 2006:

Do you have a decent debugger?  If so can you say where the crash occurs.

Where did you get the startup files from?

You need to ensure the startup files:
i/setup IRQ and supervisor stacks
ii/handle interrupt entry and exit as per the iar example for the str9
iii/call main in supervisor mode

are you doing all these things?

fabtor wrote on Tuesday, October 03, 2006:

Hi,
Actually i aven’t a decent debugger because the Ride Raisonance toolkit that i use doesn’t provide a rom debugger and the ram debugger is limited to 16k. What i must used?
The startup file are provided by Raisonance and modified by me as follows:

.extern main
.extern exit
.extern VIC0_BASE
.extern VIC1_BASE

.code 32
.align 0

.extern _sidata
.extern _sdata
.extern _edata
.extern _sbss
.extern _ebss

;/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.set  Mode_USR, 0x10            ;/* User Mode */
.set  Mode_FIQ, 0x11            ;/* FIQ Mode */
.set  Mode_IRQ, 0x12            ;/* IRQ Mode */
.set  Mode_SVC, 0x13            ;/* Supervisor Mode */
.set  Mode_ABT, 0x17            ;/* Abort Mode */
.set  Mode_UND, 0x1B          ;/* Undefined Mode */
.set  Mode_SYS, 0x1F            ;/* System Mode */

.equ  I_Bit, 0x80               ;/* when I bit is set, IRQ is disabled */
.equ  F_Bit, 0x40               ;/* when F bit is set, FIQ is disabled */

/*; — System memory locations */

;/* init value for the stack pointer. defined in linker script */
.extern _estack

;/* Stack Sizes. The default values are in the linker script, but they can be overriden. */
SRAM_Base = 0x04000000
SRAM_Limit= 0x04018000

.set    UND_Stack_Size, 0x00000004
.set    ABT_Stack_Size, 0x00000004
.set    FIQ_Stack_Size, 0x00000004
.set    IRQ_Stack_Size, 0x00000400
.set    SVC_Stack_Size, 0x00000400

/***************************************************************************************/

.section .flashtext
.code 32
.align 0
.globl _start
.globl _startup

_startup:
_start:

        ldr     PC, Reset_Addr
        ldr     PC, Undefined_Addr
        ldr     PC, SWI_Addr
        ldr     PC, Prefetch_Addr
        ldr     PC, Abort_Addr
        nop                          /*; Reserved vector*/
        ldr     pc, [pc,#-0xFF0]     /*; IRQ Handler ***I use this but i think that isn’t correct ***
    ldr      PC, Fiq_Addr
       
Reset_Addr      : .long     Reset_Handler
Undefined_Addr  : .long     UndefinedHandler
SWI_Addr        : .long        vPortYieldProcessor
Prefetch_Addr   : .long     PrefetchAbortHandler
Abort_Addr      : .long     DataAbortHandler
Fiq_Addr        : .long        FIQHandler
                  .long 0      /*; Reserved vector*/

UndefinedHandler         : b     .                         /* undefined                */
PrefetchAbortHandler    : b     .                         /* program abort            */
DataAbortHandler        : b     .                         /* data abort                */
FIQHandler                : b     .                         /* FIQ                        */

Reset_Handler:
  
/* Setup a stack for each mode - note that this only sets up a usable stack
    for system/user, SWI and IRQ modes.   Also each mode is setup with
    interrupts initially disabled. */
    ldr r0, =_estack
    msr    CPSR_c, #Mode_FIQ|I_Bit|F_Bit
    ldr    SP,    =FIQ_Stack_Size
   
    msr    CPSR_c, #Mode_IRQ|I_Bit|F_Bit
    ldr    SP,    =IRQ_Stack_Size
   
    msr    CPSR_c, #Mode_ABT|I_Bit|F_Bit
    ldr    SP,    =ABT_Stack_Size
   
    msr    CPSR_c, #Mode_UND|I_Bit|F_Bit
    ldr    SP,    =UND_Stack_Size
   
    msr    CPSR_c, #Mode_SVC|I_Bit|F_Bit
    ldr    SP,    =SVC_Stack_Size
   
    msr    CPSR_c, #Mode_SYS|I_Bit|F_Bit
   
   
    /* We want to start in supervisor mode.  Operation will switch to system
    mode when the first task starts. */
    msr   CPSR_c, #Mode_SVC|I_Bit|F_Bit

    ;/* copy the initial values for .data section from FLASH to RAM */
    ldr    R1, =_sidata
    ldr    R2, =_sdata
    ldr    R3, =_edata
   
   
_reset_inidata_loop:
    cmp    R2, R3
    ldrlO    R0, [R1], #4
    strlO    R0, [R2], #4
    blO    _reset_inidata_loop

;/* Clear the .bss section */
    mov   r0,#0                        ;/* get a zero */
    ldr   r1,=_sbss                ;/* point to bss start */
    ldr   r2,=_ebss                ;/* point to bss end */

   
   
_reset_inibss_loop:
    cmp   r1,r2                        ;/* check if some data remains to clear */
    strlo r0,[r1],#4                ;/* clear 4 bytes */
    blo   _reset_inibss_loop    ;/* loop until done */
      
/************************************************************************************************/
/*; — Now enter the C code */
/*             ldr    PC, ___main
    ___main      : .long     main*/

b    main
            
The only problem is to handle the interrupt entry and exit. IAR use the IRQ_Handler function in 91x_vect.c and the portSAVE_Context and portRESTORE_Context are in the ISR_Support.h file.
In gcc port this file doesn’t exist and the fuctions are included in portmacro.h as #define. if i use the IRQ_Handler on my startup file i obtain undefined reference error to portSAVE and portRESTORE from the compiler. For the rest, the file seems to be correct. Please take a look to the file. It’s most important to me to know that is correct. Thanks!

nobody wrote on Tuesday, October 03, 2006:

>ldr pc, [pc,#-0xFF0] /*; IRQ Handler ***I use this but i think that isn’t correct *** 

This is not how the IAR example does it as you say and it might be that the -0xff0 is incorrect for the str9.  The IAR demo uses:

LDR        PC, IRQ_Addr

then defines IRQ_Addr to save the context, call the switch function, then restore the context.  You can copy the actual IRQ_Addr function from 91x_vect_IAR.s in the FreeRTOS download.  The missing portSAVE_CONTEXT and portRESTORE_CONTEXT functions are defined in ISR_Support.h which is included at the top of 91x_vect_IAR.s.  They are assembly macros that use the IAR syntax, I think you can simply change to use GAS (GNU assembler) syntax which is a bit simpler anyway.