Hello,
Yes even we don’t have coherent cache for 2 R5 cores. I have few basic doubts
-Here 2 R5 cores will run on same memory map and each will be having own elf?
-What I understood same scheduler will run on both cores, but for R52 we need to define different stack pointers for r52 different modes sys/irq/fiq/hyp
-If same code runs on both core then how second core will be getting up. Will it be like second core will start and setup gic and stack pointer and be in wfi then primary core will wakeup?