nobody wrote on Wednesday, September 20, 2006:
On an LPC2134 based system using GCC, I’ve got an issue where FreeRTOS causes a data abort when I use portEXIT_SWITCHING_ISR.
I’ve got an I2C driver where the ISR simply reads the I2C status and passes it to a task to process. At the end of the I2C ISR I’ve got this:
portEXIT_SWITCHING_ISR( xSemaphoreGiveFromISR( hI2Csemaphore, pdFALSE ) );
which works for a random number of I2C interrupts (usually a few hundreds) after which the processor fires a data abort. If I simply pass pdFALSE to the portEXIT_SWITCHING_ISR macro, the code works fine but my throughput is hit because only one interrupt can be processed per schedule cycle. The task waiting on the semaphore is high priority (max priority - 1).
When the data abort happens, the processor is invariably in the vListInsertEnd() function on the line saying
pxNewListItem->pxNext = pxIndex->pxNext;
and pxIndex is pointing to somewhere in the internal register address space (0xE001XXXX), which leads me to believe that there is an issue with the task list handling being re-entered when it shouldn’t be. There seems to be very little protection code around the list code.
I’ve compiled in both “all ARM” mode and in “mostly thumb with ISRs in ARM” mode. Both perform the same.
Anyone got any clues to what could be happening?