Hope someone can make me understand NVIC priority and FreeRTOS priority on Cortex M3 CPU’s? (If that is possible :-))
From the FreeRTOS website:
“Therefore, any interrupt service routine that uses an RTOS API function must have its priority manually set to a value that is numerically equal to or greater than the configMAX_SYSCALL_INTERRUPT_PRIORITY setting.”
My configMAX_SYSCALL_INTERRUPT_PRIORITY is defined to 40 ( 5 << (8 - configPRIO_BITS) )
I’m using CMSIS libary function NVIC_SetPriority(…) to set the NVIC priorities for interrupts.
The NVIC_SetPriority function does the shifting.
So which number must be greater or equal to configMAX_SYSCALL_INTERRUPT_PRIORITY
The value used in the NVIC_SetPriority function or the resulting priority???
I do have some ISR’s calling xxxxGiveFromISR API function. So the NVIC priority set for those ISR’r must be set to more then 40?
As I understand a higher prio number on a Cortex M3 is equal to lower prioriy and in FreeRTOS it is higher?