New +TCP does not work with SAM4E

I was using the previous version “Still in the Lab” of +TCP and my hardware SAM4E worked great. I have now ported to 10.3 and the latest +TCP and It told me I had to define GMAC_USES_TX_CALLBACK 1. Is this new GMAC code for a different micro? The callback prototypes cal for three parameters but the code only provides two. Do I need the callbacks (RX and TX) for the SAM4E?

Hello Larry,

There is a newer, better driver than the one for SAM4E, which you find here.

This “DriverSAM” has already been used a long time, but only recently I created a pull request for it: PR #78 on github/FreeRTOS/FreeRTOS.

You will also have to include the new phyHandling.c

If you have more questions, you can ask them in this thread.

These files refer to conf_board.h looking for the define CONF_BOARD_ENABLE_CACHE. I assume this an eval board from Atmel for the SAM70. I searched for conf_board but nothing showed up . I also assume I should replace all copies of the gmac.h files with the single file gmac_sam.h

I see in the gmac_sam.c file that the #include conf_board is bracketed by a #ifdef SAM70.
I think the NetworkInterface show use the same bracket around the #include conf_board.h
Do I also need to replace the current ethernet_phy.(c/h) with the phyHandling.(c/h).
Where is ipFALSE_BOOL defined?

Indeed, CONF_BOARD_ENABLE_CACHE is only applicable for the SAME70 which has memory caching.

Correct, phyHandling.(c/h) will replace the earlier PHY code.

Where is ipFALSE_BOOL defined?

That is only defined in the latest FreeRTOS+TCP found on aws.

#define ipTRUE_BOOL   ( 1 == 1 )
#define ipFALSE_BOOL  ( 1 == 2 )

They were introduced in FreeRTOS_IP.c because of MISRA checks.

I am sorry to be such pest, but I can’t get DriverSAM to work. My hardware has not changed and the older drivers files work. On WireShark I see the ARP request but I never get eNetworkRxEvent: in the IPTask(). Given that ipFALSE_BOOL is defined in FreeRTOS+TCP do I need other files? What/where is aws.
Another piece of information is The GMAC Receive Status register has the HNO (HRESP Not Ok) bit set when it get triggered.

if( !!( pxPhyObject->ulLinkStatusMask & ulBitMask ) != !!( ulStatus & phyBMSR_LINK_STATUS ) )
What does the !! mean NOT NOT?
Thanks for you help