cyberknight_don wrote on Sunday, April 02, 2006:
The vector table in the boot.s of ARM7LPC2016, specifies a vector table, and for the IRQ interrupt its loading PC with
ldr pc, [pc,#-0xFF0]
What this actually does?
I have found the VIC memory mapping in the file lpc210x.h.
What will happen if there are multiple IRQ interrupts?
nobody wrote on Sunday, April 02, 2006:
This allows auto vectoring to the ISR by reading the address directly from the VIC. Please read the manual for the LPC2106 where this is explained.
cyberknight_don wrote on Sunday, April 02, 2006:
Sir, I didn’t find any reference to VECTDATA_IRQ defined in lpc210x.h in the manual.
Can u please tell for what this is used for?
Let me guess, when an IRQ occurs ,this line in boot.s
ldr pc, [pc,#-0xFF0] executes.
After that what happens?
What is placed in the address [pc,#-0xFF0] ?
The starting addresses of ISRs are placed in VectAdddrX ,right?
nobody wrote on Sunday, April 02, 2006:
Take a look at:
http://www.semiconductors.philips.com/acrobat/usermanuals/UM_LPC2106_2105_2104_1.pdf
Pages 70 and 218. This is where the code comes from.