Thanks for the reply Tony…
For debug logs do you mean the “FSL debug console”? if yes, these are my logs currently:
Seed for randomiser: 0
Random numbers: 0 15A 82 2AE6
FreeRTOS_AddEndPoint: MAC: 44-55 IPv4: c0a801c8ip
Hello from main
--- prvIPTask started
Starting PHY initialization.
Configuration successful. Waiting for link to go up and auto-negotiation to complete.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Link up.
Waiting for auto-negotiation to complete.
Auto-negotiation complete.
ENET initialized.
Driver ready for use.
IP Address: 192.168.1.200
Subnet Mask: 255.255.255.0
Gateway Address: 192.168.1.1
DNS Server Address: 208.67.222.222
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
ECCOMI ------------------------ ENET Phy_speed = 1, Phy_duplex = 1
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
Timer Task Tick.
Print del task 1!
Print del task 1!
ECCOMI ------------------------ ENET Phy_speed = 1, Phy_duplex = 1
... (and so on) ...
somethimes i receive this log (after 2+ minutes of uptime):
...
Failed to send the frame - driver busy!
Timer Task Tick.
ECCOMI ------------------------ ENET Phy_speed = 1, Phy_duplex = 1
...
about the pxInterface->pfInitialize
, it returns in pxMyInterface
.
From the debugger i can see the interface being populated:
pxMyInterface NetworkInterface_t * 0x2000608c <xInterfaces>
pcName const char * 0x20004f8c <pcName.4> "NXP10600
pvArgument void * 0x0
pfInitialise NetworkInterfaceInitialiseFunction_t 0x60002dad <prvNXP1060_NetworkInterfaceInitialise>
pfOutput NetworkInterfaceOutputFunction_t 0x60002f21 <prvNXP1060_NetworkInterfaceOutput>
pfGetPhyLinkStatus GetPhyLinkStatusFunction_t 0x60002fbd <prvNXP1060_GetPhyLinkStatus>
bits struct {...} {...}
pxEndPoint struct xNetworkEndPoint * 0x200060ac <xEndPoints>
pxNext struct xNetworkInterface * 0x0
and if i expand a little, it populates like this (JSON formatted for readability):
{
"pxMyInterface": {
"pcName": "NXP10600",
"pvArgument": null,
"pfInitialise": "prvNXP1060_NetworkInterfaceInitialise",
"pfOutput": "prvNXP1060_NetworkInterfaceOutput",
"pfGetPhyLinkStatus": "prvNXP1060_GetPhyLinkStatus",
"bits": {
"bInterfaceUp": 1,
"bCallDownEvent": 0
},
"pxEndPoint": {
"ipv4_settings": {
"ulIPAddress": 3355551936,
"ulNetMask": 16777215,
"ulGatewayAddress": 16885952,
"ulDNSServerAddresses": [0, 0],
"ulBroadcastAddress": 4278298816,
"ucDNSIndex": 0
},
"ipv4_defaults": {},
"xMACAddress": {},
"bits": {
"bIsDefault": 0,
"bWantRA": 0,
"bIPv6": 0,
"bCallDownHook": 1,
"bEndPointUp": 1
},
"usDNSType": 0,
"xDHCP_RATimer": {},
"xRAData": {},
"pxNetworkInterface": {
"pcName": "NXP10600",
"pvArgument": null,
"pfInitialise": "prvNXP1060_NetworkInterfaceInitialise",
"pfOutput": "prvNXP1060_NetworkInterfaceOutput",
"pfGetPhyLinkStatus": "prvNXP1060_GetPhyLinkStatus",
"bits": {
"bInterfaceUp": 1,
"bCallDownEvent": 0
},
"pxEndPoint": {},
"pxNext": null
},
"pxNext": null
},
"pxNext": null
}
}
About the BOARD_InitENETPins
i double checked it, but i was confident it was already ok because i used the default board.c|h files provided by NXP for the evaluation board.
The only thing i don’t understand is the “ENET_INT” pin, because in the LwIP example it is pulled up (set as output and HIGH) before PHY reset, and i can’t see any code that reconfigures it as input with interrupt; in my code i commented out this part (in the InitEthernet
function) but i can see that it is configured as interrupt during pin config and it is pulled-up by 1k resistor.
Here is the relevant portion from LwIP example :
// main.c
int main(void)
{
gpio_pin_config_t gpio_config = {kGPIO_DigitalOutput, 0, kGPIO_NoIntmode};
BOARD_ConfigMPU();
BOARD_InitBootPins();
BOARD_InitBootClocks();
BOARD_InitDebugConsole();
BOARD_InitModuleClock();
IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true);
GPIO_PinInit(GPIO1, 4, &gpio_config);
GPIO_PinInit(GPIO1, 22, &gpio_config);
/* Pull up the ENET_INT before RESET. */
GPIO_WritePinOutput(GPIO1, 22, 1);
GPIO_WritePinOutput(GPIO1, 4, 0);
SDK_DelayAtLeastUs(10000, CLOCK_GetFreq(kCLOCK_CpuClk));
GPIO_WritePinOutput(GPIO1, 4, 1);
MDIO_Init();
g_phy_resource.read = MDIO_Read;
g_phy_resource.write = MDIO_Write;
/* Initialize lwIP from thread */
if (sys_thread_new("main", stack_init, NULL, INIT_THREAD_STACKSIZE, INIT_THREAD_PRIO) == NULL)
LWIP_ASSERT("main(): Task creation failed.", 0);
vTaskStartScheduler();
/* Will not get here unless a task calls vTaskEndScheduler ()*/
return 0;
}
// pin_mux.c
void BOARD_InitPins(void) {
CLOCK_EnableClock(kCLOCK_Iomuxc);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 1U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_40_ENET_MDIO, 0U);
IOMUXC_SetPinMux(IOMUXC_GPIO_EMC_41_ENET_MDC, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_04_GPIO1_IO04, 0xB0A9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0x10B0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_10_ENET_RDATA00, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_11_ENET_RX_EN, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_ENET_RX_ER, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_ENET_TX_EN, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_14_ENET_TDATA00, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_06_GPIO1_IO22, 0xB0A9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_40_ENET_MDIO, 0xB0E9U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_EMC_41_ENET_MDC, 0xB0E9U);
}