shahafsh wrote on Monday, September 09, 2019:
Does FreeRTOS requires port to have memory cohernecy?
if not, how does semaphores/mutex are expected to work in non-coherent port?
richard_damon wrote on Monday, September 09, 2019:
FreeRTOS is primarily aimed as single processor systems. As such, memory cohernecy isn’t a concern for the OS. If you need to do something for things like DMA, that is the applications responsibility as that is outside the control of FreeRTOS.
It can also work in an AMP environments (Asymetric Multi-Processing) where a given instance of FreeRTOS exists on a given core. In which case the core-to-core communication layer will need to handle any cohernecy issues, but the rest of the system doesn’t need to concern itself with it.
The has been some work on SMP versions (Symetric Multi-Processing) but these need some fundamental changes to FreeRTOS as this changes some basic assumptions in the code.
shahafsh wrote on Monday, September 09, 2019:
Thanks for the reply.
on SMP w/ FreeRTOS - can you ellborate which basic assumption in code break?
richard_damon wrote on Monday, September 09, 2019:
One big one is that you can have a cheap usable critical section by just disabling interrupts, or a just slightly longer one by just turning off the scheduler.
The lack of need to worry about using memory barriers to get coherency is another one.