Cortex M3 Order of MPU regions

bainorama wrote on Tuesday, December 03, 2013:

I’m using the Cortex M3 MPU port and I’d like to configure my application to protect only the OS data, while allowing the non-privileged tasks access to everything else; however there doesn’t seem to be a simple way to achieve this. The OS appears to be reserving MPU regions 0-3 for itself, and allowing regions 4-7 to be set per task. Since higher index MPU regions override lower ones, wouldn’t it be better to do this the other way around (OS uses 4-7 and tasks use 0-3)? Is there another way to achieve the configuration I’m after?

davedoors wrote on Wednesday, December 04, 2013:

Declare a static const MPU regions structure that covers all memory not used by the kernel, then assign that to each task as they are created.

dumarjo wrote on Wednesday, December 04, 2013:

Hi,

I just finish coding a simple application with the Cortex-M4 and What I
did is changed the way the initial port was done.

probably a way of doing what you want, is to disable background, set
region 0 (all the 4 gig) to USER_RW and then set region 7 to privileged
RW for the OS section. If you want to protect also the flash section you
will need to add the Region 6 to the flash section too.

This should work. With this setup, you should have 4 or 3 free region
for your tasks.

Jonathan

Jonathan
Le 2013-12-03 17:13, bainorama a écrit :

I’m using the Cortex M3 MPU port and I’d like to configure my
application to protect only the OS data, while allowing the
non-privileged tasks access to everything else; however there doesn’t
seem to be a simple way to achieve this. The OS appears to be
reserving MPU regions 0-3 for itself, and allowing regions 4-7 to be
set per task. Since higher index MPU regions override lower ones,
wouldn’t it be better to do this the other way around (OS uses 4-7 and
tasks use 0-3)? Is there another way to achieve the configuration I’m
after?


Cortex M3 Order of MPU regions
https://sourceforge.net/p/freertos/discussion/382005/thread/32662fa9/?limit=50#6529


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