configASSERT fail on xQueueSendFromISR

joe_her wrote on Saturday, November 01, 2014:

Trying to figure out why this happens, according to the comments in the code,:
/* The following assertion will fail if a service routine (ISR) for
an interrupt that has been assigned a priority above
configMAX_SYSCALL_INTERRUPT_PRIORITY calls an ISR safe FreeRTOS API
function. ISR safe FreeRTOS API functions must only be called
from interrupts that have been assigned a priority at or below
configMAX_SYSCALL_INTERRUPT_PRIORITY.
… */

so I changed this HAL_NVIC_SetPriority to configMAX_SYSCALL_INTERRUPT_PRIORITY, but it still fail.
This code is part of USB host, for STM32F4, code is the library by ST.
//---------------
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
HAL_NVIC_SetPriority(OTG_FS_IRQn, configMAX_SYSCALL_INTERRUPT_PRIORITY, 0);
HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
//----------------
Any ideas and tips how to debug this will help.
Thanks.

rtel wrote on Saturday, November 01, 2014:

configMAX_SYSCALL_INTERRUPT_PRIORITY is probably a full 8 bit value, whereas NVIC_SetPriority() requires a shifted priority. I know this is complex but it is how the Cortex-M works. I tried explaining it on this page: http://www.freertos.org/RTOS-Cortex-M3-M4.html

Most newer projects have a conversion in the FreeRTOSConfig.h file, something like the following:

/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
	/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
	#define configPRIO_BITS       		__NVIC_PRIO_BITS
#else
	#define configPRIO_BITS       		4        /* 15 priority levels */
#endif

/* The lowest interrupt priority that can be used in a call to a “set priority”
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0xf

/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5

/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. /
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/ !!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )

So in that case configLIBRARY_LOWEST_INTERRUPT_PRIORITY is set by hand as a shifted value (and therefore easier to understand for a human) and configKERNEL_INTERRUPT_PRIORITY is then generated automatically. Likewise configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY.

The ‘LIBRARY’ prefix denoting that it is the version to be used in library function calls. So in your code you want to use configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY to prevent the assert triggering.

Regards.

joe_her wrote on Sunday, November 02, 2014:

I read the page at http://www.freertos.org/RTOS-Cortex-M3-M4.html as it is in the comment above the assert line, but did not understand that I need to use configLIBRARY_LOWEST_INTERRUPT_PRIORITY.

This solved the problem.

Thank you.