nobody wrote on Friday, August 12, 2005:

Hi, I’m considering using the port for the AT91SAM7S64 (EK) I will be using external serial flash, and also communicating to a FPGA using SSC I have looked at the demo and it seems fine for what it is, but how complex is it to use the memory and SSC ports, does anyone have experience?
What are the downfalls? I have heard there are problems with nested interrupts?

Thanks in advance for your help.

rtel wrote on Friday, August 12, 2005:

The peripheral questions are more processor support rather than directly FreeRTOS support questions.

Regarding nested interrupts:  As downloaded the FreeRTOS demo for the SAM7 has changed the standard Atmel interrupt handling code to remove support for nested interrupts as it is not compatible with using FreeRTOS. 

However, the use of FreeRTOS reduces the requirement for nested interrupts. 
All the ISR has to do is send any data or event information onto a queue for processing at the task level.  This can be done very quickly and be done immediately upon the interrupt occurance (rather than running the Atmel code which performs some manipulation prior to the ISR executing in order to allow nesting).

The priority of the tasks can then be set to ensure that any data or events are processed in accordance with your systems requirements.  For example, if an interrupt is of top priority the task that handles the interrupt data can have the highest priority ensuring it always executes immediately following the interrupt.  While it executes interrupts will be enabled allowing other events to be buffered.

If you want to use nested interrupts then you have to modify the FreeRTOS port code to basically count the nesting depth (just increment a counter each interrupt occurrence), then only allow a context switch when the nesting depth unwinds back to zero.