Zynq + FreeRTOS interrupt problem

devil1989 wrote on Thursday, June 29, 2017:


I am using a Zynq-7000 with FreeRTOS and some custom hardware IPs inside the FPGA. Those IPs send interrupts to the ARM core but I have some problems while handling them.
The interrupt routine is correctly called after receiving the interrupt but, as soon as it executes “xQueueReceiveFromISR()”, I get two errors an the execution stops.

The errors are:
Assert failed in file port.c, line 539
Assert failed in file port.c, line 424

The first error is related to the following function, in particular to the first “configASSERT()”:

void vPortValidateInterruptPriority( void )
		/* The following assertion will fail if a service routine (ISR) for
		an interrupt that has been assigned a priority above
		function.  ISR safe FreeRTOS API functions must *only* be called
		from interrupts that have been assigned a priority at or below

		Numerically low interrupt priority numbers represent logically high
		interrupt priorities, therefore the priority of the interrupt must
		be set to a value equal to or numerically *higher* than

		FreeRTOS maintains separate thread and ISR API functions to ensure
		interrupt entry is as fast and simple as possible. */

		/* Priority grouping:  The interrupt controller (GIC) allows the bits
		that define each interrupt's priority to be split between bits that
		define the interrupt's pre-emption priority bits and bits that define
		the interrupt's sub-priority.  For simplicity all bits must be defined
		to be pre-emption priority bits.  The following assertion will fail if
		this is not the case (if some bits represent a sub-priority).

		The priority grouping is configured by the GIC's binary point register
		(ICCBPR).  Writting 0 to ICCBPR will ensure it is set to its lowest
		possible value (which may be above 0). */


The second error is related to the following function, in particular to the last “configASSERT()”:

void vPortEnterCritical( void )
	/* Mask interrupts up to the max syscall interrupt priority. */

	/* Now interrupts are disabled ulCriticalNesting can be accessed
	directly.  Increment ulCriticalNesting to keep a count of how many times
	portENTER_CRITICAL() has been called. */

	/* This is not the interrupt safe version of the enter critical function so
	assert() if it is being called from an interrupt context.  Only API
	functions that end in "FromISR" can be used in an interrupt.  Only assert if
	the critical nesting count is 1 to protect against recursive calls if the
	assert function also uses a critical section. */
	if( ulCriticalNesting == 1 )
		configASSERT( ulPortInterruptNesting == 0 );

Does anyone have any idea of what the problem may be?


rtel wrote on Thursday, June 29, 2017:


devil1989 wrote on Thursday, June 29, 2017:

Thanks for the link.

As the link says, “configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET” should be equal to 0x1000. In my BSP that #define is ( -0xf00 ). Could it be a problem?

Moreover, I understood that the priority of my interrupts should be lower than configMAX_API_CALL_INTERRUPT_PRIORITY (that is 18 in my case), but I do not know how to check/change their priority.
Is there a function to do that?

Thanks for the help!

devil1989 wrote on Friday, June 30, 2017:

Problem solved.

When interrupts are initialized, after “XScuGic_Connect()”, you should call “XScuGic_SetPriorityTriggerType(XScuGic *InstancePtr, u32 Int_Id, u8 Priority, u8 Trigger)” and set the priority of each interrupt ( Priority = your_priority << portPRIORITYSHIFT).

Thank you all!