I am using a Xilinx Zynq7 with an ARM Cortex A9 cpu together with FreeRTOS.
In my application I need to react pretty fast (<2 microseconds) to a GPIO interrupt.
I need to give a semaphore in the ISR that unblocks a task which sends an SPI command.
Currently it takes nearly 15 us before the SPI starts sending.
The CPU clocks at 666 MHz, the GPIO Interrupt priority in the ARM GIC is set to 160, the interrupts captured on the GPIO pin are edge-sensitive, active high
In order to avoid possible latency-increasing factors, I ran a test in a separate test project, with a single task waiting for the semaphore to be given & no TCP/IP stack running.
The latency is still more or less the same as in my original application (which uses TCP/IP stack and has several tasks running in background).
Does anybody know anything I could try to decrease the latency further, or is this already the best it gets?
I enabled configUSE_TASK_FPU_SUPPORT for every task which means that the FPU registers must be saved on every interrupt. Could this be a meaningful latency increasing factor?
The thing is, I need the FPU support enabled as I use several FreeRTOS resources in the ISR(s).
Maybe I could avoid using FPU registers in this single ISR that matters in term of low latency, but not for all. Is it even possible to call only some ISRs withought prior saving FPU registers?
Thanks for your time!