I’m trying to write some very basic code with freertos and libopencm3 to run on a STM32F7 Discovery Board.
To keep it simple I’m starting with a simple Blinky.
With that I was able to create a Task, that just runs gpio_toggle and this works, the LED gets dim.
Now adding vTaskDelay(1000) to the task results in some strange behaviour:
If I just run the code, it gets a hard_fault with IACCVIOL=1.
If I put a breakpoint at vTaskDelay(1000) and continue from there, it also gets a hard_fault.
But if I step into vTaskDelay(1000), step over all the Instructions inside vTaskDelay(1000), return to my Task function, remove the Breakpoint and let it continue, it just works.
Which STM32 are you using and which FreeRTOS port are you using (Cortex-M3 or 4). Does it have caches, or external memory?
Do you have configCHECK_FOR_STACK_OVERFLOW set to 2 and configASSERT defined?
Which version of the kernel are you using? Asking as different versions have different amount of assert points. Version number is at the top of the source files.
I am using the NUCLEO-F767ZI Board with first the ARM_CM7 and now the ARM_CM4F port.
Regarding caches or external memory I’m not sure, but I don’t see anything in my linker file besides RAM(384KB), ROM(2MB) and CCM(128KB) as per the STM32F767ZI Datasheet. There seems to be no external RAM on this board.
As for configCHECK_FOR_STACK_OVERFLOW, it is set to 2. configASSERT is just added to my FreeRTOSConfig.h as this (from here):
/* Define configASSERT() to disable interrupts and sit in a loop. */ #define configASSERT(x) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
I’m currently using the V10.4.1-kernel-only branch.
According to https://www.st.com/en/microcontrollers-microprocessors/stm32f767zi.html the part does have a cache. Just to try and help track down the issue - try running the code with the cache disabled. If you step through the start up code you should see where the cache gets enabled, so the easiest thing to do would be just comment out those lines temporarily.
As it seems from here the STM32F76xx Series seems to use the r1P0 core, therefor I’m compiling it with the ARM_CM4F port.
Regarding the startup sequence I was unable to find much. The reset_vector is implemented in vectors.c of libopencm3 and I don’t see anything related to caches.
Which file is pre_main() implemented in - its not easy to find in github - is it specific to your CM7 device or a generic implementation from this git repo?