Using ARM7 IRQ mode with STR750

jakbird wrote on Friday, September 28, 2007:

Environment is FreeRTOS V4.3, GCC 4.2, ST peripheral driver library and the STR750 (ARM7TDMI-S) controller.  Interrupts are not nested, and FIQ not used.  IRQ mode has a separate stack allocated.

Which CPU mode should be used when handling interrupts when RTOS calls are made for queues and context switching inside the interrupt handler?  The example library provided by ST switches from IRQ to SYS mode while procesing an interrupt event generated by peripherals, switching back to IRQ after the interrupt handler completes.  However, I am not switching modes, staying in IRQ mode through the entire interrupt, and I don’t use the ST provided interrupt handler examples to go with the ST library.  Does the interrupt mode make a difference to FreeRTOS?
  Jack Peacock

davedoors wrote on Friday, September 28, 2007:

If you are not wanting the interrupt to cause a context switch then there are no special requirements.  If you are wanting the interrupt to cause a context switch then FreeRTOS demonstrates two methods which are

i/ Vector directly to each interrupt individually.  In this scheme the interrupt should be declared naked and the FreeRTOS macros used to save and restore the task context.  This is done from IRQ mode.  This is the way most of the ARM7 ports are configured, but not I don’t think all.

ii/ Have a common interrupt entry point that saves the task context, then vectors to the interrupt handler which is just an ordinary C function, then restores the context after the C function completes.  The restored context might be different to that which was saved if a context switch has occurred.  This is demonstrated in the STR9 demo and maybe some others.  This also uses IRQ mode.

Never use startup code that manipulates the registers and processor mode before vectoring to an interrupt other than the method ii/ FreeRTOS code described here.  The system will simply crash if you do as this is not how the FreeRTOS code expects to find the processor or stacks.