UART RECEIVE INTERRUPT NOT WORKING

curious-9 wrote on Thursday, May 25, 2017:

Hi,

I have developed UART application for STM32f103 with freertos.
I am facing problem with UART reception. UART receive interrupt works only for starting few ms.
After that it stops.
I think i am facing problem with priority but couldn’t understand where and how?

Below are my firmware details .
#define configPRIO_BITS 4
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 3
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )

#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )

below line is executed at the starting of the initialization.
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);

UART interrupt priorit is set at

HAL_NVIC_SetPriority(USART1_IRQn, 3, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);

Thanks in advace for help.....

heinbali01 wrote on Thursday, May 25, 2017:

When you post code on this forum, it gets a strange formatting because of some characters like * and #.
You can escape them by putting them between back-quotes.

Or, you can also escape an entire block of source code by putting it in between two lines consisting of 3 tilde’s only ( ````` )

Like this:

```
#define configPRIO_BITS                               4
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY       3
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY  3
#define configKERNEL_INTERRUPT_PRIORITY      ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
```

Here and here you find recent threads about the same subject.

And as written everywhere: make sure that configASSERT will be called, and that configASSERT_DEFINED is defined as 1.

Have a look at ARM_CM4F/port.c around line 703:

#if( configASSERT_DEFINED == 1 )

    void vPortValidateInterruptPriority( void )
    {
    ...

A lot of text has been written about this subject, most importantly here

Regards.

curious-9 wrote on Thursday, May 25, 2017:

Thanks Hein Tibosch -

i HAVE USE STM32CUBESUITE FOR CREATEING FREERTOS FILE
As per my understanding assigning priorities are correct. Correct me if i am wrong.

#define configPRIO_BITS                               4
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY       3
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY  3
#define configKERNEL_INTERRUPT_PRIORITY      ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )

below line is executed at the starting of the initialization.
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
UART interrupt priorit is set at
HAL_NVIC_SetPriority(USART1_IRQn, 3, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);

And as written everywhere: make sure that configASSERT will be called, and that configASSERT_DEFINED is defined as 1.

configASSERT_DEFINED is defined as 1 and for configASSERT
Correct me if my usage of configASSERT is wrong.
/PRIORITY IS DEFINED AS osPriorityNormal/
code snippets

void vMODBCommTask(void const * argument)
{
	uint32_t ulNotificationValue;
  /* USER CODE BEGIN vMODBCommTask */
	MODB_Initialization();
  /* Infinite loop */
  for(;;)
  {
				
		MODB_MainTask();
		/* Wait for the transmission to complete. */
    ulNotificationValue = ulTaskNotifyTake( pdFALSE, 1000 );

    if( ulNotificationValue == 1 )
    {
        /* The RECEPTION ended as expected. */
    }
    else
    {
        /* The call to ulTaskNotifyTake() timed out. */
    }
				
    osDelay(2);/*2 ms*/
  }

}


void MODB_MainTask(void)
{
		configASSERT( xTaskToNotify == NULL );

   /* Store the handle of the calling task. */
   xTaskToNotify = xTaskGetCurrentTaskHandle();
	
	{
		/* Check for Valid frame received and respond accordingly */
		if(MODB_ProcessReceivedFrame(MODB_COMM,&g_st_ModbusReceivedFrame,&g_st_ModbusTransmitFrame))
		{
			while(g_st_Modbus_Variables.ui32_ThreeAndHalfCharCount < 
							g_st_Modbus_Variables.ui32_ThreeAndHalfCharCompareCount)
			{
				osDelay(2);/*2ms*/
			}
			/* Send Response frame */
			MODB_TransmitResponseFrame(&g_stUART1_MODB,g_st_ModbusTransmitFrame.ui8_Data,g_st_ModbusTransmitFrame.ui8_DataLength);
		}
	}
	
}

void MODB_UART_RX_Callback(UART_HandleTypeDef *huart)
{

	BaseType_t xHigherPriorityTaskWoken;
	if(huart->Instance == MODB_UART)
	{
		MODB_RTU_ReceiveFrame (g_st_Modbus_Variables.ui8_RecByte, &g_st_Modbus_Variables, &g_st_ModbusReceivedFrame);
		MODB_RTS_OFF
		HAL_UART_Receive_IT(huart, &g_st_Modbus_Variables.ui8_RecByte, MODB_UART_RX_NO_BYTE);
		if(g_st_ModbusReceivedFrame.ui8_IsValidFrameReceived)
		{
			xHigherPriorityTaskWoken = pdFALSE;
			 configASSERT( xTaskToNotify != NULL );
			vTaskNotifyGiveFromISR( MODBCommTaskHandle, &xHigherPriorityTaskWoken );
			xTaskToNotify = NULL;
			portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
		}
	}
	
}


**OS PRIORITY ARE DEFINED AS**
/// Priority used for thread control.
/// \note MUST REMAIN UNCHANGED: \b osPriority shall be consistent in every CMSIS-RTOS.
typedef enum  {
  osPriorityIdle          = -3,          ///< priority: idle (lowest)
  osPriorityLow           = -2,          ///< priority: low
  osPriorityBelowNormal   = -1,          ///< priority: below normal
  osPriorityNormal        =  0,          ///< priority: normal (default)
  osPriorityAboveNormal   = +1,          ///< priority: above normal
  osPriorityHigh          = +2,          ///< priority: high
  osPriorityRealtime      = +3,          ///< priority: realtime (highest)
  osPriorityError         =  0x84        ///< system cannot determine priority or thread has illegal priority
} osPriority;


LIST OF INTERRUPTS ARE BELOW /**/
/******  Cortex-M3 Processor Exceptions Numbers ***************************************************/
  NonMaskableInt_IRQn         = -14,    /*!< 2 Non Maskable Interrupt                             */
  HardFault_IRQn              = -13,    /*!< 3 Cortex-M3 Hard Fault Interrupt                     */
  MemoryManagement_IRQn       = -12,    /*!< 4 Cortex-M3 Memory Management Interrupt              */
  BusFault_IRQn               = -11,    /*!< 5 Cortex-M3 Bus Fault Interrupt                      */
  UsageFault_IRQn             = -10,    /*!< 6 Cortex-M3 Usage Fault Interrupt                    */
  SVCall_IRQn                 = -5,     /*!< 11 Cortex-M3 SV Call Interrupt                       */
  DebugMonitor_IRQn           = -4,     /*!< 12 Cortex-M3 Debug Monitor Interrupt                 */
  PendSV_IRQn                 = -2,     /*!< 14 Cortex-M3 Pend SV Interrupt                       */
  SysTick_IRQn                = -1,     /*!< 15 Cortex-M3 System Tick Interrupt                   */

/******  STM32 specific Interrupt Numbers  *********************************************************/
  WWDG_IRQn                   = 0,      /*!< Window WatchDog Interrupt                            */
  PVD_IRQn                    = 1,      /*!< PVD through EXTI Line detection Interrupt            */
  TAMPER_IRQn                 = 2,      /*!< Tamper Interrupt                                     */
  RTC_IRQn                    = 3,      /*!< RTC global Interrupt                                 */
  FLASH_IRQn                  = 4,      /*!< FLASH global Interrupt                               */
  RCC_IRQn                    = 5,      /*!< RCC global Interrupt                                 */
  EXTI0_IRQn                  = 6,      /*!< EXTI Line0 Interrupt                                 */
  EXTI1_IRQn                  = 7,      /*!< EXTI Line1 Interrupt                                 */
  EXTI2_IRQn                  = 8,      /*!< EXTI Line2 Interrupt                                 */
  EXTI3_IRQn                  = 9,      /*!< EXTI Line3 Interrupt                                 */
  EXTI4_IRQn                  = 10,     /*!< EXTI Line4 Interrupt                                 */
  DMA1_Channel1_IRQn          = 11,     /*!< DMA1 Channel 1 global Interrupt                      */
  DMA1_Channel2_IRQn          = 12,     /*!< DMA1 Channel 2 global Interrupt                      */
  DMA1_Channel3_IRQn          = 13,     /*!< DMA1 Channel 3 global Interrupt                      */
  DMA1_Channel4_IRQn          = 14,     /*!< DMA1 Channel 4 global Interrupt                      */
  DMA1_Channel5_IRQn          = 15,     /*!< DMA1 Channel 5 global Interrupt                      */
  DMA1_Channel6_IRQn          = 16,     /*!< DMA1 Channel 6 global Interrupt                      */
  DMA1_Channel7_IRQn          = 17,     /*!< DMA1 Channel 7 global Interrupt                      */
  ADC1_2_IRQn                 = 18,     /*!< ADC1 and ADC2 global Interrupt                       */
  USB_HP_CAN1_TX_IRQn         = 19,     /*!< USB Device High Priority or CAN1 TX Interrupts       */
  USB_LP_CAN1_RX0_IRQn        = 20,     /*!< USB Device Low Priority or CAN1 RX0 Interrupts       */
  CAN1_RX1_IRQn               = 21,     /*!< CAN1 RX1 Interrupt                                   */
  CAN1_SCE_IRQn               = 22,     /*!< CAN1 SCE Interrupt                                   */
  EXTI9_5_IRQn                = 23,     /*!< External Line[9:5] Interrupts                        */
  TIM1_BRK_IRQn               = 24,     /*!< TIM1 Break Interrupt                                 */
  TIM1_UP_IRQn                = 25,     /*!< TIM1 Update Interrupt                                */
  TIM1_TRG_COM_IRQn           = 26,     /*!< TIM1 Trigger and Commutation Interrupt               */
  TIM1_CC_IRQn                = 27,     /*!< TIM1 Capture Compare Interrupt                       */
  TIM2_IRQn                   = 28,     /*!< TIM2 global Interrupt                                */
  TIM3_IRQn                   = 29,     /*!< TIM3 global Interrupt                                */
  TIM4_IRQn                   = 30,     /*!< TIM4 global Interrupt                                */
  I2C1_EV_IRQn                = 31,     /*!< I2C1 Event Interrupt                                 */
  I2C1_ER_IRQn                = 32,     /*!< I2C1 Error Interrupt                                 */
  I2C2_EV_IRQn                = 33,     /*!< I2C2 Event Interrupt                                 */
  I2C2_ER_IRQn                = 34,     /*!< I2C2 Error Interrupt                                 */
  SPI1_IRQn                   = 35,     /*!< SPI1 global Interrupt                                */
  SPI2_IRQn                   = 36,     /*!< SPI2 global Interrupt                                */
  USART1_IRQn                 = 37,     /*!< USART1 global Interrupt                              */
  USART2_IRQn                 = 38,     /*!< USART2 global Interrupt                              */
  USART3_IRQn                 = 39,     /*!< USART3 global Interrupt                              */
  EXTI15_10_IRQn              = 40,     /*!< External Line[15:10] Interrupts                      */
  RTC_Alarm_IRQn              = 41,     /*!< RTC Alarm through EXTI Line Interrupt                */
  USBWakeUp_IRQn              = 42,     /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */
  TIM8_BRK_IRQn               = 43,     /*!< TIM8 Break Interrupt                                 */
  TIM8_UP_IRQn                = 44,     /*!< TIM8 Update Interrupt                                */
  TIM8_TRG_COM_IRQn           = 45,     /*!< TIM8 Trigger and Commutation Interrupt               */
  TIM8_CC_IRQn                = 46,     /*!< TIM8 Capture Compare Interrupt                       */
  ADC3_IRQn                   = 47,     /*!< ADC3 global Interrupt                                */
  FSMC_IRQn                   = 48,     /*!< FSMC global Interrupt                                */
  SDIO_IRQn                   = 49,     /*!< SDIO global Interrupt                                */
  TIM5_IRQn                   = 50,     /*!< TIM5 global Interrupt                                */
  SPI3_IRQn                   = 51,     /*!< SPI3 global Interrupt                                */
  UART4_IRQn                  = 52,     /*!< UART4 global Interrupt                               */
  UART5_IRQn                  = 53,     /*!< UART5 global Interrupt                               */
  TIM6_IRQn                   = 54,     /*!< TIM6 global Interrupt                                */
  TIM7_IRQn                   = 55,     /*!< TIM7 global Interrupt                                */
  DMA2_Channel1_IRQn          = 56,     /*!< DMA2 Channel 1 global Interrupt                      */
  DMA2_Channel2_IRQn          = 57,     /*!< DMA2 Channel 2 global Interrupt                      */
  DMA2_Channel3_IRQn          = 58,     /*!< DMA2 Channel 3 global Interrupt                      */
  DMA2_Channel4_5_IRQn        = 59,     /*!< DMA2 Channel 4 and Channel 5 global Interrupt        */
} IRQn_Type;




I AM NOT ABLE UNDERSTAND WHERE I AM MAKING MISTAKE.

rtel wrote on Thursday, May 25, 2017:

configLIBRARY_LOWEST_INTERRUPT_PRIORITY looks very wrong. It should
probably be 15 (4 bits, as defined by configPRIO_BITS).

curious-9 wrote on Friday, May 26, 2017:

HI All,

@Real Time Engineers ltd. -
Code works with even with
configLIBRARY_LOWEST_INTERRUPT_PRIORITY 3
because i am not using priority greater than 3.

For ALL
Above mention code works completely perfect.
Problem: RTS pin direction change not happen after transmitting …

@Real Time Engineers ltd. :Thanks again
@Hein Tibosch -hanks again

Hi,

I have also facing same issue with UART reception. i developed application for STM32H743ZI with freeRTOS.
In my case Transmit interrupt is working fine but receive interrupt only came first time.
I am interfacing UG96 cellular module STM32H743ZI here command was transmitting properly but response is not getting.
How to resolve this issue?

You need to figure out if the module it not responding to the command sent or the module is responding but your ISR/Callback is not executing.

Are you using ST HAL? If yes, does your error callback get invoked? You can try to put a breakpoint here to see if the ISR is getting invoked: STM32CubeH7/stm32h7xx_hal_uart.c at master · STMicroelectronics/STM32CubeH7 · GitHub

Thanks.

Yes i am using ST HAL Libraries. After first receive interrupt error callback Receiver Timeout error invoked responding in Reception.
Please clear out me it’s hardware issue or somthing went wrong in software side.

This probably means that the UART receive timed out. You can try increasing the receive timeout. Is there any other way to communicate with the module (like COM port or something) to ensure that the command you are sending is correct?

In any case, this is probably not related to FreeRTOS. I’d suggest to reach out to ST if it is the module is responding correctly and ISR is not getting invoked or to Quectel if the module is not responding as expected.

Thanks.