TriCore And FreeRTOS SMP

The multi-core CPU(like TC275、TC367、TC397…) of the TRICORE architecture can only create threads on the corresponding cores. Core0 cannot create Core1 tasks, including IDLE tasks:

//core0_main.c
core0_main()
{
   xTaskCreate(....);
vTaskStartScheduler();
}
//core1_main.c
core1_main()
{
   xTaskCreate(....);
}

So the “prvCreateIdleTasks” function is not appropriate in TRICORE .
Moreover, TRICORE does not support thread switching between different CPUs, that is to say, when creating a thread, it must be bound to a specific CPU.
FREERTOS should provide a similar API:

//core0_main.c
core0_main()
{
   vCoreInit( portGET_CORE_ID);//create timer、idle thread
   xTaskCreatePinnedToCore(.....)
vTaskStartScheduler();// start scheduler
}
.....
BaseType_t xPortStartScheduler( void )
{
      tick timer init;
     portYIELD_CORE(1);
     portYIELD_CORE(2);
     ......
     start core0 thread;

}

//core1_main.c
core1_main()
{
   vCoreInit( portGET_CORE_ID);//create timer、idle thread

}

vCoreInit/xTaskCreatePinnedToCore/ like this

I’m new to the FreeRTOS forums and don’t have permission to upload files. Please search on github:
Infineon-AURIX_TC3xx_Architecture-UserManual

Done in this PR - SMP: Add task creation with affinity functions by Dazza0 · Pull Request #470 · FreeRTOS/FreeRTOS-Kernel · GitHub

prvCreateIdleTasks->xTaskCreate->xTaskCreateAffinitySet->prvInitialiseNewTask->pxPortInitialiseStack

in tricore :
pxPortInitialiseStack()
{
  var csa=GetCurrentCpuFreeCsaArea();
  init csa; 
   init sp;
  int .....
}

For the TRICORE architecture, each core can only access its own CSA and cannot access the CSAs of other cores, so xTaskCreate must be executed on the corresponding core!

This is hard to achieve without delegating it to the application - is it possible to delay this initialization of CSA until the task starts and do it first thing in the task? If so, we can pin all the IDLE tasks to their respective cores and that would address your problem. Pardon my unfamiliarity with the TriCore architecture.