System restarts

saiberion wrote on Monday, April 23, 2007:


I have a problem with the AT91SAM7S Controller using the SPI over DMA.
I already had the application working (no interrupts, no dma) and now I’d like to use the DMA for better performance.
DMA transfer for itself works but after the transfer and it’s output to my serial debug port FreeRTOS starts again from the beginning in main().

Here some code snippets:
command for initiating a DMA transfer:

void spiDMA_sendandreceive(portCHAR cs, portCHAR *datatosend, portCHAR sizeofsend, portCHAR* datatoreceive, portCHAR sizeofreceive)
___portCHAR rectmp;
___// Use given Chipselect for transfer
___// Initialize the Transmit and Receive Pointer
___AT91C_BASE_SPI->SPI_RPR = (unsigned int)datatoreceive;
___AT91C_BASE_SPI->SPI_TPR = (unsigned int)datatosend;

___// Intialize the Transmit and Receive Counters
___AT91C_BASE_SPI->SPI_RCR = sizeofreceive;
___AT91C_BASE_SPI->SPI_TCR = sizeofsend;
___// Enable Interrupts just for DMA transfer; The most of the application still uses the existing SPI commands   
___// Wait for receive to be finished

The ISR: (xQueueSPIRec from above and xSPIRecQueue from below are identical; queue passing as in EMAC example in uIP demo)
void SPIISR(void)
___portBASE_TYPE    xTaskPreviouslyWoken;
___portCHAR cRec;
___cRec = 0xb5;
___xTaskPreviouslyWoken = pdFALSE;
___xTaskPreviouslyWoken = xQueueSendFromISR(xSPIRecQueue,&cRec,xTaskPreviouslyWoken );


call of DMA:
portSHORT sRec;

The SPI has following configuration:
Master Mode, Fixed Peripheral, chip select generation with decoder;
(each chip select register) CPOL = 0, NCPHA = 1, CSAAT = 0, 8-Bit transfers, SCK ~ 2MHz

embeddedc wrote on Monday, April 23, 2007:

I was going to suggest that you look at the EMAC example as this uses the DMA, but reading your post again it seems you are already doing this.

As you are always passing pdFALSE to portEXIT_SWITCHING_ISR() then you need not bother with the portENTER_SWITCHING_ISR/portEXIT_SWITCHING_ISR() macros and could instead just use the __IRQ attribute (assuming GCC).  This would save you a bit of stack in case it is a stack issue that is causing the problem.

saiberion wrote on Tuesday, April 24, 2007:

I again reviewed the EMAC code and the documentation. The Emac works with DMA but for the SPI I intend to use the PDC as DMA controller (EMAC doesn’t have PDC controls).

But somehow, like magic, my given code above today works perfectly Oo. At first I thought it was because enabling/disabling the PDC was the cause because after splitting this up in 2 calls it already worked.
Today back stepping my changes to find the erroneous part. But I ended with my code example I gave. Weird thing :wink: