I am new to FreeRTOS and I am trying to create a timer to count every 10 nanoseconds.
The timer will be used as the system’s timestamp.
I am not sure where to begin.
I found, in the BSP settings, that the kernel tick_rate is 100 ticks per second (10 millisecond which is too slow for me and I can’t change it) so I can’t use the xTaskGetTickCount() function.
I’m afraid that adding interrupts will burden the system if it ticks in high frequency because I also have high-priority interrupts already that can’t be interfered.
I wanted to activate another TTC and use it but the BSP throws an error:
“”"
Error occurred while generating bsp sources for the domain ‘domain_psu_cortexr5_0’.
Failed to generate the bsp sources for domain.domain_psu_cortexr5_0
Details: ERROR: Cannot select multiple timers for tick generation
ERROR: [Hsi 55-1545] Problem running tcl command ::sw_freertos10_xilinx_v1_6::generate : mdt_error
(procedure “::sw_freertos10_xilinx_v1_6::generate” line 1)
invoked from within
“::sw_freertos10_xilinx_v1_6::generate freertos10_xilinx”
ERROR: [Hsi 55-1442] Error(s) while running TCL procedure generate()
“”"
You DON’T want a timer that interrupts every 10 nanoseconds, or that will be way too fast for the system to process.
That also means you can’t use a timer with a resolution of 10 ns as a system tick (to try to make delays accurate to a 10 ns resolution).
If you have a 100 MHz clock in your system, you can build a clock that you can read to get a 10ns resolution time stamp, it just won’t be the ‘system time stamp’ that the tick is based on.
Perhaps if you describe the actually problem you are trying to solve (I want to do xxx with a 10 ns resolution) then we can help you better. If it is just marking time, then a readable counter makes sense. If you need to actually make something happen to the precision, you may need to add a programmable interrupt on match to that counter to schedule things, but note that 10 ns is close to the speed the processor is running, so final accuracy of actually getting something done at the precision will be challenging.
I am presuming from the references in your errors, that you are building on a Xilinx FPGA, possible using one of the built in Arm Processors on the Zynq die. In such an environment, often things at that sort of precision are handled on the FPGA side, and the processor is just configuring/aquiring data at a slower rate.
I am developing over zcu104 using the cortex r-5 core.
The board speed is 120 MHz on debug but later-on it will run standalone in 500 MHz.
I need to pass messages from the board out through Ethernet and the messages must include a time-stamp that updates every 10 nanoseconds.
I only need to get the time-stamp every time I send a message and add it to the message’s payload.
Normally I send a message every 1 millisecond, sometimes more.
I wish to implement a getTimeStamp() function, or a readable counter as you said, that every time I call it, it will return the current time-stamp according to the timer\counter I need to create.
I tried to create something like this:
void vTickClock()
{
ts_counter++;
}
int main()
{
ts_timer = xTimerCreate(timer_name, 1, pdTRUE, (void *) 0, vTickClock);
if( ts_timer == NULL )
{
/* The timer was not created. */
}
else
{
/* Start the timer. No block time is specified, and
even if one was it would be ignored because the RTOS
scheduler has not yet been started. */
if( xTimerStart( ts_timer, 0 ) != pdPASS )
{
/* The timer could not be set into the Active state. */
}
}
vTaskStartScheduler();
while(1);
return 0;
}
The problem here is that the xTimerPeriodInTicks must be greater than 0 and then it is the same as the kernel tick_rate value which is 100 ticks per second.
As Richard explained you need a dedicated, separate HW timer with the desired resolution.
Either there is one already built-in the R5 MCU or connected to it via AXI bus (running at 120/500 MHz) or you’ve to implement one in the PL. The FreeRTOS (SysTick based) SW timers are not suitable for high-resolution time stamping.
Yes, Hartmut is right here. I don’t think there is a register in the R4 MCU you will be able to use based on your system configuration, so you will need to build a counter in the Programable Logic of your FPGA that implements the counter and allow the processor to read it over the AXI bus. I would need to check, but there might be a standard Xylinx core to add a readable timer, its been a bit since I worked on a Zynq processor.
I’ve found your suggestions very helpful. I used xtime_l.h file that contains Get and Set functions for TTC. The ticks are too fast but I think I know how to handle it.
I declared a timer pointer (XTime *) and XTime_GetTime() function to update the timer pointer every time I want to pull the timer value.
Hope I am doing it right, still got a lot to learn.