SWI and nested interrupts

Kernel
1

robitknarf wrote on Friday, June 22, 2007:

I use LPC2138 and our application is quite time critical so we use interrupts. To enable nested interrupts we use these two macros:

/* Nested Interrupts Entry                                                  */
#define NESTED_INTERRUPTS_ENABLE()                                          
  asm volatile (                                                            
    "MRS LR, SPSR            \n\t"  /* Copy SPSR_irq to LR    */            
    "STMFD SP!, {LR}         \n\t"  /* Save SPSR_irq          */            
    "MSR CPSR_c, #0x1F       \n\t"  /* Enable IRQ (Sys Mode)  */            
    "STMFD SP!, {LR}         \n\t"  /* Save LR                */            
  );                                                                        
{

/* Nested Interrupts Exit                                                   */
#define NESTED_INTERRUPTS_DISABLE()                                         
}                                                                           
  asm volatile (                                                            
    "LDMFD SP!, {LR}         \n\t"  /* Restore LR */                        
    "MSR CPSR_c, #0x92       \n\t"  /* Disable IRQ (IRQ Mode) */            
    "LDMFD SP!, {LR}         \n\t"  /* Restore SPSR_irq to LR */            
    "MSR SPSR_cxsf, LR       \n\t"  /* Copy LR to SPSR_irq */               
  );

While we use IRQ it works fine. But the operating system uses SWI to perform context switch and I don’t know how to enable nested interrupts inside SWI ISR. How can I do it to get really fast response on interrupts? I need to enter interrupt service routine within 10us.

Thanks

2

davedoors wrote on Friday, June 22, 2007:

Change the portENTER_CRITICAL and portEXIT_CRITICAL macros to only disable IRQ, not FIQ, then set your high priroity interrupt to use FIQ.  There was something in another thread on this today.