paulromero wrote on Tuesday, July 15, 2014:
Below is a partially commented list of the differences between
the STM32L152-EVAL and STM32L-Discovery board initialization
code. The first obvious difference is the user of the
internal clock on the Discovery board versus the external
clock on the STM32L152-EVAL board. Search for the word
“Comment” for further differences. (i.e. Only the code
related to clock configuration has detailed comments.)
Is it possible the use of the external clock is the problem ?
**************** KEY *************
< Means STM32L152-Eval Board with
Means the STM32L-Discovery board
Both cases STM32L152VB Processor
Comment: Pin Names.
19,20c19,20
RCC_CR Register External Clock
< RCC->CR |= RCC_CR_HSEON;
< while ((RCC->CR & RCC_CR_HSERDY)==0);
RCC_CR Register Internal Clock
RCC->CR |= RCC_CR_HSION;
while ((RCC->CR & RCC_CR_HSIRDY)==0);
30c30
Comment: Exact clock configuration.
PLL: Entry Clock Source, MUL12 Configruation, Clock Output = CKVCO 3
< RCC->CFGR = RCC_CFGR_PLLSRC|RCC_CFGR_PLLMUL12|RCC_CFGR_PLLDIV3;
PLL: MUL 4 Configuration, Clock Ouput = CKVCO 2
RCC->CFGR = RCC_CFGR_PLLMUL4|RCC_CFGR_PLLDIV2;
35c35
< SystemCoreClock = 32000000; // 32 Mhz
SystemCoreClock = 32000000; // 32 Mhz
38c38
< //STM32L152-EVAL LD1 led connected to port D pin 0, Key push-button is connected to port C pin 13 (EXTI 13).
//STM32L-DISCOVERY LD3 led connected to port B pin 7, User push-button is connected to port A pin 0 (EXTI 0).
43,46c43,46
Comment: GPI Setup - TBD: Investigate
< // Turn on GPIOD, GPIOC
< RCC->AHBENR |= RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN;
< // Set PD_0 to output
< GPIOD->MODER |= GPIO_MODER_MODER0_0;
// Turn on GPIOA, GPIOB
RCC->AHBENR |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN;
// Set PB_7 to output
GPIOB->MODER |= GPIO_MODER_MODER7_0;
49,52c49,52
49,52c49,52
< // Associate PC_13_PIN to EXTINT13 - interrupt on a falling edge
< SYSCFG->EXTICR[3] |= SYSCFG_EXTICR4_EXTI13_PC;
< EXTI->FTSR |= 1 << 13; // falling edge trigger
< EXTI->IMR |= 1 << 13; // enable interrupt
// Associate PA_0_PIN to EXTINT0 - interrupt on a falling edge
SYSCFG->EXTICR[0] |= SYSCFG_EXTICR1_EXTI0_PA;
EXTI->FTSR |= 1 << 0; // falling edge trigger
EXTI->IMR |= 1 << 0; // enable interrupt
59c59
< GPIOD->BSRRL = (1<<0);
GPIOB->BSRRL = (1<<7);
61c61
< GPIOD->BSRRH = (1<<0);
GPIOB->BSRRH = (1<<7);
67c67
Comment: Interrupt Configuration.
< EXTI15_10_IRQHandler(void)
EXTI0_IRQHandler(void)
70c70
< if (EXTI->PR & (1<<13))
if (EXTI->PR & (1<<0))
73c73
< EXTI->PR = (1<<13);
EXTI->PR = (1<<0);
82,83c82,83
< ctl_set_priority(EXTI15_10_IRQn, ctl_adjust_isr_priority(ctl_highest_isr_priority(), -1));
< ctl_unmask_isr(EXTI15_10_IRQn);
ctl_set_priority(EXTI0_IRQn, ctl_adjust_isr_priority(ctl_highest_isr_priority(), -1));
ctl_unmask_isr(EXTI0_IRQn);