Hi,
I have a few different memory regions on a STM32H7. As a result, heap_5.c is used for managing the heap.
That said, I have some variables that need to be placed manually at a specific region.
When I do that, I get a conflict between the automatic allocation and the manual allocation.
The only option that I can think of is to use that entire region with manual allocation.
But If manual allocation is avoidable, that looks much better.
Is that possible ?
For example, my scatter file looks thus:
LR_IROM1 0x08000000 0x00200000 { ; load region size_region
ER_IROM1 0x08000000 0x00200000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM2 0x24000000 0x00080000 { ; RW data
.ANY (+RW +ZI)
}
RW_DMARxDscrTab 0x30040000 0x60 {
*(.RxDecripSection)
}
RW_DMATxDscrTab 0x30040060 0x140 {
*(.TxDecripSection)
}
RW_Rx_Buffb 0x30040200 0x1800 {
*(.RxArraySection)
}
}
My heap initialization looks thus:
#define __ram(__addr) __attribute__((at(__addr)))
/**
* 0x38800000 - 0x38800FFF ( 4096) Backup SRAM
* 0x38000000 - 0x3800FFFF ( 65536) SRAM4
* 0x30040000 - 0x30047FFF ( 32768) SRAM3
* 0x30020000 - 0x3003FFFF ( 262144) SRAM2
* 0x30000000 - 0x3001FFFF ( 131072) SRAM1
* 0x24000000 - 0x2407FFFF ( 524288) AXI SRAM
* 0x20000000 - 0x2001FFFF ( 131072) DTCM
* 0x1FF00000 - 0x1FF1FFFF ( 131072) System Memory
* 0x08100000 - 0x081FFFFF (1048576) Flash memory bank 2
* 0x08000000 - 0x080FFFFF (1048576) Flash memory bank 1
* 0x00000000 - 0x0000FFFF ( 65536) ITCM
*/
#define MEMSIZ(__start, __end) ((__end - __start) + 1)
#define SRAM_AXI (uint32_t) 0x24000000
#define SRAM_AXI_END (uint32_t) 0x2407ffff
#define SRAM_AXI_SIZ MEMSIZ(SRAM_AXI, SRAM_AXI_END)
#define SRAM_1 (uint32_t) 0x30000000
#define SRAM_1_END (uint32_t) 0x3001ffff
#define SRAM_1_SIZ MEMSIZ(SRAM_1, SRAM_1_END)
#define SRAM_2 (uint32_t) 0x30020000
#define SRAM_2_END (uint32_t) 0x3003ffff
#define SRAM_2_SIZ MEMSIZ(SRAM_2, SRAM_2_END)
#define SRAM_3 (uint32_t) 0x30040000
#define SRAM_3_END (uint32_t) 0x30047fff
#define SRAM_3_SIZ MEMSIZ(SRAM_3, SRAM_3_END)
#define SRAM_4 (uint32_t) 0x38000000
#define SRAM_4_END (uint32_t) 0x3800ffff
#define SRAM_4_SIZ MEMSIZ(SRAM_4, SRAM_4_END)
#define SRAM_RTC (uint32_t) 0x38800000
#define SRAM_RTC_END (uint32_t) 0x38800fff
#define SRAM_RTC_SIZ MEMSIZ(SRAM_RTC, SRAM_RTC_END)
static void init_heap(void)
{
static uint8_t heap_1[SRAM_AXI_SIZ] __ram(SRAM_AXI); /* SRAM_AXI */
static uint8_t heap_2[SRAM_1_SIZ] __ram(SRAM_1); /* SRAM_1 */
static uint8_t heap_3[SRAM_2_SIZ] __ram(SRAM_2); /* SRAM_2 */
static uint8_t heap_4[SRAM_3_SIZ] __ram(SRAM_3); /* SRAM_3 */
static uint8_t heap_5[SRAM_4_SIZ] __ram(SRAM_4); /* SRAM_4 */
HeapRegion_t xHeap[] = {
{(uint8_t *) heap_1, sizeof (heap_1)}, /* SRAM_AXI */
{(uint8_t *) heap_2, sizeof (heap_2)}, /* SRAM_1 */
{(uint8_t *) heap_3, sizeof (heap_3)}, /* SRAM_2 */
{(uint8_t *) heap_4, sizeof (heap_4)}, /* SRAM_3 */
{(uint8_t *) heap_5, sizeof (heap_5)}, /* SRAM_4 */
{NULL, 0} /* Terminate Array */
};
vPortDefineHeapRegions(xHeap);
}
and the manual allocation looks thus:
__attribute__((section(".RxDecripSection"))) ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
__attribute__((section(".TxDecripSection"))) ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
__attribute__((section(".RxArraySection"))) uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE]; /* Ethernet Receive Buffer */
How to handle this mixed application in a graceful manner ?
(If possible, I would like to do away with the manual allocation itself. Is that the right thing to do ?)
Any thoughts/suggestions ?
Thanks,
Manu