STM32H7 and FreeRTOS with MPU

jffglima wrote on Monday, November 26, 2018:

Hello everyone,

For my current project I need the FreeRTOS+MPU to work on H7. I got it somehow to work when I use DTCMs. However, when I try to move the complete memory allocation to the AXI SRAMs the FreeRTOS is hanging in the systick handler (there is a for(;:wink: there and goes out with break instructions).

After some experiments it was found that the system works if I do the following:
•Disable the DCACHE completly or
•Set an MPU region for the freeRTOS heap memory as non-cacheable (TEX = 001b, c = 0b, b = 0b)

I dont understand how I can have a cache coehrency problem since I dont have any DMAs or other processes writing into the AXI ram. The project is very very simple. It is just one thread and in the run function I have a counter incrementing.

To map the FreeRTOS to H7 I follow the steps on the following thread:

https://freertos.org/FreeRTOS_Support_Forum_Archive/May_2018/freertos_Cortex-M7_MPU_a9b4e3d5j.html

I attach the Attolic project here. in the main.h there are two compile switches. The system works if the ENABLE_DCACHE is commented or both ENABLE_DCACHE and ENABLE_NON_CACHEABLE_FREERTOS_HEAP are enabled.

I am running out of ideas what to try. Any help would be great.

Thanks a lot,
Best regards,
Joao

jffglima wrote on Thursday, December 06, 2018:

If I use the exactly same code but use a F7 instead, then I dont see the problem. Is there any difference in terms of cache configuration that we would need to do to the H7?

Any Ideas would be very welcome

Thanks
Joao

rtel wrote on Thursday, December 06, 2018:

Do the two boards have the same core revision number? If the hardware
has an r0p1 revision of the Cortex-M core then you need to use the
special FreeRTOS version that accounts for the silicon errata.

jffglima wrote on Friday, December 07, 2018:

Hello Richard,

Thanks for the reply. My H7 board has the r1p1 and F7 the r1p0, so I guess the H7 is even newer. But in any case I have taken the MPU M4 port version and merged the errata related changes. I have them in the xPortPendSVHandler. I also tried to place “dsb” and “isb” instruction every time a set of MPU registers are set but did not help. The code gets stuck in the function xTaskIncrementTick, within the for(;:wink: loop. Can that give any hint? My only thread is just counting variables up and then I call the vTaskDelay.

The problems seems to be related with tasks sleeping and waking them up. If I just exchange the vTaskDelay by a portYIELD, then the system does not stuck, but I need the vTaskDelay in my application :slight_smile:

below is my only task code.

Thanks a lot!
Br,
Joao

void TC_Run( void *pvParameters)
{

while(1)
{
	tTcPrivate1.receive_counter++;
	tTcPrivate2.receive_counter++;
	tTcPrivate3.receive_counter++;
	tTcPrivate4.receive_counter++;
	tTcPrivate5.receive_counter++;
	tTcPrivate6.receive_counter++;
	tTcPrivate7.receive_counter++;
	tTcPrivate8.receive_counter++;
	tTcPrivate9.receive_counter++;
	tTcPrivate10.receive_counter++;
	tTcPrivate11.receive_counter++;
	tTcPrivate12.receive_counter++;
	portYIELD();
	//osDelay(1);

}

}

daimonion1980 wrote on Thursday, February 21, 2019:

Hey joao
Could you solve your problem?
I’m actually trying to get freertos10 to work on stm32H7 but still didn’t found an r1p1 port.

rtel wrote on Thursday, February 21, 2019:

If you don’t have an r0p1 core then you can just use the Cortex-M4F port

  • are you facing any other issue?

daimonion1980 wrote on Thursday, February 21, 2019:

Actually i’m trying to understand the whole cubeMX HAL/CMSIS FreeRTOS Stuff and try to separate the freeRTOS Stuff from cubeMX to use freertos 10 instead of 9. And this is the only thread where there is a working project with freertos10 on stm32h7. :wink:

rtel wrote on Thursday, February 21, 2019:

Updating from V9.x to V10.x should be straight forward:
https://www.freertos.org/FreeRTOS-V10.html

And what if we do have a r0p1 core?

Here is the answer - FreeRTOS-Kernel/ReadMe.txt at main · FreeRTOS/FreeRTOS-Kernel · GitHub