If there are only 32 bits to be transferred over SPI from a slave device to the master running freeRTOS, which is better; to have the task poll for 4 received bytes, or have the SPI use DMA ( STM32 ) with a DMA "TransmittionComplete’ callback which then sends a Task notification to the blocked task?
Is it less overhead to have the task poll considering there are only 4 bytes received?
What is “best” will depend on the speed of the SPI bus. For 4 bytes, the DMA is likely excess overhead. For a fast bus, a spin wait may be reasonable (if the transfer will take less than two scheduling operations), and for a slower one, since the FIFO should be long enough, use a transfer complete interrupt to read the 4 bytes.
That makes sense. I’ll use the SPI word size buffer to hold the 32 bit value and skip DMA all together. I’ll use the RXNE interrupt to send a notification to unblock the task.
UPDATE: My bad, I do need to use the DMA FIFO buffer at minimum since the SPI buffer can only be 16bits wide. I thought I would be able to just use the SPI->DR 32 bit register to hold the 32 bits but SPI has no setting for 32bit wide transfer, only 16bit. I think the register is divided into 2, half for TX and half for RX. I could be missing something though.