SMP port to PowerPC assert in tasks.c

Hello, i’m making a port of FreeRTOS-SMP to PowerPC microcontrollers. For the moment i made the port like showed in the paper, taking inspiration from the existing demos.

I successfully started the second core, but i run into an issue, this first core then block on the following assert in prvSelectHighestPriorityTask (tasks.h):

        configASSERT( ( uxCurrentPriority > tskIDLE_PRIORITY ) || ( xTaskScheduled == pdTRUE ) );

Has anyone any kind of idea of what’s going on ? It’s like it cannot even find the IDLE0 task.

Thanks in advance because i’m totally out of ideas right now.

were you able to get the non-SMP FreeRTOS version running first?

Yes, it runs. The SMP version runs if I don’t start the second core (core #1), too.

In fact I am using soft IRQs to yield and if I deactivate the IRQ for core #1 it lives its best life in a minimal Idle and the system runs, so it is somewhat related.

Which PowerPC are you using?

It’s a mpc5748g, the cores are e200z4

I’m using the hw semaphores from the chip as spin locks btw

Thanks - what I meant to ask is which PowerPC port are you using. i.e. which FreeRTOS port layer are you running on the device.

I’m not sure I understand the question as I’m a low level embedded software engineer but not a FreeRTOS expert at all.

I am using the latest SMP release, from october 2021 I believe.

The original port on non-SMP FreeRTOS has been made by NXP, which I based my work on and finally modified so heavily there’s not much of it left. For example they were using syscalls to yield, which I replaced by soft IRQs to allow cross core yielding.

The directory I use is portable/GCC/PowerPC

I can attach some source code on Monday if it can help the community and myself, but the drivers part and external libraries will be missing as they are property of my employer

Hey, the source code from the port i’m curently working on is available on GitHub, at user jnaulet, project FreeRTOS-Kernel, branch smp (sorry i don’t have the right to post a direct link).

Unfortunately, this is incomplete as it requires NXP SDK (available by downloading S32DS) and 2 specific drivers (tick and semaphores), which are quite trivial to be honest.

Reply to myself: caches were activated on core #1 and not on core #0