SMP error occurred when set config configRUN_MULTIPLE_PRIORITIES = 1

Kernel
1

Hi all!
I am porting freertos smp for arm ca7, I meet problem when set configRUN_MULTIPLE_PRIORITIES = 1 which hang on vListInsert. I read the comments on it but still can not find the reason.
I use the test example reference FreeRTOS-SMP-Demos/main.c at main · FreeRTOS/FreeRTOS-SMP-Demos · GitHub
My config shows as follew and I set assert function

#define configRUN_MULTIPLE_PRIORITIES 1
#define configUSE_CORE_AFFINITY 0
#define configMAX_API_CALL_INTERRUPT_PRIORITY 0x11
#define configCHECK_FOR_STACK_OVERFLOW 2

The causes listed:

  1. Stack overflow: I set the configCHECK_FOR_STACK_OVERFLOW and implement vApplicationStackOverflowHook.
  2. Interrupt priority assginment: I just run the demo, no external interrupts.
  3. Calling an API function from witch a critical section or when the scheduler is suspended. The function used in demo is all kernel API, and i did not change the kernel;
  4. At this time, I check the value of xSchedulerRunning, xSchedulerRunning is pdTrue.
  5. I did not set nested IRQ

The program hangs after queue reveive

QueueReceive: 1


#0  0x80409de8 in vListInsert (pxList=0x80421a1c <ucHeap+52>, pxNewListItem=0x80423ae8 <ucHeap+8448>) at ../../Source/list.c:166
#1  0x804052dc in vTaskPlaceOnEventList (pxEventList=0x80421a1c <ucHeap+52>, xTicksToWait=4294967295) at ../../Source/tasks.c:3964
#2  0x804087a0 in xQueueReceive (xQueue=0x804219f8 <ucHeap+16>, pvBuffer=0x80423aa4 <ucHeap+8380>, xTicksToWait=4294967295) at ../../Source/queue.c:1424
#3  0x80401f5c in prvQueueReceiveTask (pvParameters=0x0) at main.c:229
#4  0x00000000 in ?? ()

Thread 2 (Thread 1.2):
#0  prvIdleTask (pvParameters=0x0) at ../../Source/tasks.c:4394
#1  0x00000000 in ?? ()

Maybe the spinlock I implement is something wrong?

Kindly help

Thanks and Regards

2

What does priority zero mean for this architecture? You cannot set 0 priority in case of Cortex-M as it unmasks all interrupts. Can you try setting it to a non-zero number?

3

sry, I make a mistake ，it is 0x11

#define configMAX_API_CALL_INTERRUPT_PRIORITY   0x11

#define configNUM_CORES                         CONFIG_CPUS_NUM
4

Can you share that implementation?

6

It seems like the list traverse failed in vListInsert(List_t * const pxList, ListItem_t * const pxNewListItem).

(gdb) p *pxList
$6 = {uxNumberOfItems = 1, pxIndex = 0x80421a24 <ucHeap+60>, xListEnd = {xItemValue = 4294967295, pxNext = 0x80423ae8 <ucHeap+8448>, pxPrevious = 0x80423ae8 <ucHeap+8448>}}

(gdb) p pxNewListItem
$18 = (ListItem_t * const) 0x80423ae8 <ucHeap+8448>

the pxNewListItem has been insert into pxList, and iteration can not point to xListEnd

7

That symptom indicate likely an issue in the critical section implementation which can be because of a faulty spin lock implementation. One possible way is to test this spin lock in isolation. You can also look at this Cortex-A implementation for one of the TI part - FreeRTOS-Kernel-Partner-Supported-Ports/TI/CORTEX_A53_64-BIT_TI_AM64_SMP at main · FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports · GitHub

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