RISCV port for non-CLINT non-SIFIVE core

Kernel
1

I am porting FreeRTOS to RISCV core, this core is not following CLINT for interrupts.

Almost, identical situation like this:
www dot freertos dot org/FreeRTOS_Support_Forum_Archive/August_2019/freertos_CLINT_vs_mtime_in_FreeRTOS_RISC-V_port_2e8d6a0c4fj dot html

I have ported FreeRTOS to ARM CM3 and other custom cores, so I have a fair idea about porting. But this RISCV porting is giving a very hard time.

I have setup portasm and freertos config files to support following definitions:

#define portasmHAS_SIFIVE_CLINT 0
#define portasmHAS_MTIME 0

I am following instructions from here:
www dot freertos dot org/Using-FreeRTOS-on-RISC-V dothtml
www dot freertos dot org/RTOS-RISC-V-FreedomStudio-QMEU dot html

I have also tried
#define portasmHAS_MTIME 1
and supplied corrected addresses for configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS.

I can see MTIME interrupt raised once, but it is not getting cleared freertos_risc_v_trap_handler. And when I use my custom timer handler under vPortSetupTimerInterrupt, the freertos_risc_v_trap_handler won’t jump to it.

After all the setup, it would just run one task, it won’t switch to other tasks.

Do you have any generic porting for RISCV which is not for non-CLINT RISCV cores?

Thank you very much.

2

Which FreeRTOS version are you using? We recently did a major re-factor of FreeRTOS RISC-V port - FreeRTOS-Kernel/portable/GCC/RISC-V at main · FreeRTOS/FreeRTOS-Kernel · GitHub

The code with correct defines should work on non-CLINT cores. Which hardware are you using? DM me, if you would like to setup a quick debug session to unblock you.

Thanks.

3

Thank you very much for your reply. I am using FreeRTOSv202112.00 (downloaded few days back from the official website) which is quite different than the link you sent. Yesterday, I have got it to work with FreeRTOSv202112.00. I disabled CLINT, MTIME (defined as 0 in header files) and used vPortSetupTimerInterrupt to configure MTIME and then jumped from freertos_risc_v_trap_handler to portasmHANDLE_INTERRUPT to call xTaskIncrementTick, clear MTIME int status and reload.

The code at the link you have sent appears cleaner, I didn’t know about it earlier.

4

That does not seem correct as the trap handler should take care of calling xTaskIncrementTick and MTIME reload. Can you try to use the latest code from main and let me know what you see? Note that you will need to program mtvec in the application now: FreeRTOS/main.c at main · FreeRTOS/FreeRTOS · GitHub

5

Yes, I do this in my code:

Note that you will need to program mtvec

I do assign freertos_risc_v_trap_handler to ‘mtvec’ in my main() as part of init, before creating tasks.

And, I spent a couple of days debugging this, it didn’t work:

trap handler should take care of calling xTaskIncrementTick and MTIME reload.

I will try to pull the latest code which you shared in this thread…

6

Apologies. Let me know what you find with the latest code and I am more than happy to help. As I said, if you have a standard mtimer, the port should take care of it.