Regarding NVIC_SetPriority() is set before the scheduler(vTaskStartScheduler) is started

  1. I am enabling the pheripherals and setting the priority with NVIC_SetPriority() before the creation of FreeRTOS task and before starting the scheduler.


  1. The interrupt set before creating task and staring of scheduler are not getting enable.

  2. The control goes to default handler and the kernel stops working.

  3. I have also tried disabling the interrupt before FreeRTOS scheduler is started then the code get stuck inside configASSERT that is because i am not setting priority correctly.

  4. What if we call FreeRTOS ISR safe API from one of the ARM controller timer will that have any affect on FreeRTOS operations ?

Thanks and Regards
Prince Tripathi

This sounds like an error in the port layer, possibly in the code to setup and start the tic timer. I remember a similar error in the Xylinx Zync port where that code reset the NVIC, so any previous setup was lost.

It might help if you indicated what port you are using.

Do you mean they don’t get enabled, or they do get enabled but are masked? FreeRTOS will leave interrupts masked between calls to the FreeRTOS API and the scheduler being started to ensure interrupts don’t attempt a context switch before the scheduler starts.

If the default handle executes then either you have not installed the interrupt handler in the vector table, or you have changed the vector base address since install the interrupt vector.

As per #1 - FreeRTOS does that already - at the processor level rather than on an interrupt by interrupt level though.

You don’t say when you want to call it - but if it is before the scheduler starts then it is probably ok provided you don’t use FreeRTOS objects that may attempt to use the scheduler, and don’t try to perform a context switch.

Just to add to what Richard already mentioned:

Try to find out the interrupt which is firing.

If it is Cortex-M, then you need to correctly set the interrupt priority. Here is some useful information - RTOS for ARM Cortex-M