With a configuration where ethernet transmissions are fast enough (rom data sent with NETCONN_NOCOPY option) I have sometimes a problem of Txdescriptors not available, and all the transmit process is blocked when calling lEMACSend.
After having set several breakpoints, I found that the EMAC TBQP register, which must point on the next free tx descriptor entry after a transmission has been completed, and should correspond to the value of uxNextBufferToClear in function vClearEMACTxBuffer, was sometimes 2 descriptors entries forward, and when vClearEMACTxBuffer is called, the ‘buffused’ bit of descriptor pointed by uxNextBufferToClear is clear (thus the descriptors are not cleared if they were chained)
where can be the problem ? is it possible that the EMAC has a problem ? or maybe the is a synchronization problem between tx interrupt and tx preparation in lEMACSend ?
thanks for helping…