portRestoreContext clobbers PIC32MZ EF Status register

pbjork wrote on Tuesday, September 08, 2015:

At the end of xPortStartScheduler(), the portRestoreContext is botching the stack frame for the first task to run. Somehow it is pulling a bad value for the CP0 Status register off the stack and corrupting several important bits including the CU1 fpu coprocessor enable bit. I don’t observe any other problems with the first task; it starts up well and continues on to several other tasks, seemingly without a hitch. It does seem, though, if I restore the Status register manually after corruption, that it gets corrupted again at each call of portRestoreContext.

Here’s what’s at the ( UBaseType_t * ) pxCurrentTCB: a nice address = 0x80004F2C.
The contents of this is, according to the memory view, is 0xA5A5A5A5. I know, not a valid value. The saved stack pointer, just before the call to portRestoreContext, is a different kind of invalid, I think:

uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB = 0x00000000 !

I don’t know why this doesn’t come up as the value 0xA5A5A5A5 that the memory view shows. But neither value seems valid as a stack pointer.

Any ideas as to the cause of this?

I’ve raised the configMAX_SYSCALL_INTERRUPT_PRIORITY and configMAX_PRIORITIES to relatively high levels. I’m trying to see whether any FreeRTOS API gets called before xPortStartScheduler(). Any other diagnostics?

Setup: the latest FreeRTOS v 8.x.x, shipping with MHC 1.06 for PIC32MZ EF family processors.

pbjork wrote on Tuesday, September 08, 2015:

Observations:

I do notice that OSAL_MUTEX_Create() is called by some third party code that I’m integrating into the project before xPortStartScheduler() is called. OSAL_USE_RTOS is defined as 1. I don’t think this is a problem. Or do I need to rewrite it to use a FreeRTOS semaphore or mutex?

I also see that when the first task is actually called, it is NOT the highest priority task.

Problem?

rtel wrote on Tuesday, September 08, 2015:

The EF parts are not supported yet - but will be soon.

Regards.

pbjork wrote on Tuesday, September 08, 2015:

Further observations:

I eliminated everything nonessential. At main(), I create a system task, then start the scheduler. That’s all. The Status Register comes back corrupted after portRestoreContext, to the system task.

Must be a configuration setting somewhere.

rtel wrote on Tuesday, September 08, 2015:

Please see my reply to your original post. EF parts are not supported
yet, but will be soon.

Regards.

pbjork wrote on Tuesday, September 08, 2015:

Oh my.

No wonder. The Harmony release notes make no mention of this. I’ll have to put out a word on the Harmony forum.

Any idea of how soon the EF parts will be supported?

rtel wrote on Tuesday, September 08, 2015:

The work is already in progress, but I’m afraid I can’t put a date on it
yet.

pbjork wrote on Tuesday, September 08, 2015:

Thanks, just saw it, responded, and put out a note on the Microchip Harmony forum.

iberoxarxa wrote on Thursday, September 17, 2015:

From Iberoxarxa we got the first results with Lua 5.3.1 running on FreeRTOS on PIC32MZ2048EFH064. MZ ports have been modified to achieve this:

  • CP0 status is initialized in pxPortInitialiseStack. portINITIAL_SR is invalid for this silicon, because it sets CU1 to 0 disabling the FPU. It is mandatory to apply 0x20000000 mask to portINITIAL_SR for enabling FPU.

  • FPU registers are 64 bit wide. There are 32 registers ($f0 to $f31). This registers must saved and restore in portSAVE_CONTEXT, portRESTORE_CONTEXT and vPortYieldISR. For this use sdc1 / ldc1 MIPS instruction. Be careful with that, so sdc1 / ldc1 requires a 8 word alignment stack. Changes in pxPortInitialiseStack are required for this.

  • FPU has 4 control registers. Register FCSR must be saved / restored in portSAVE_CONTEXT, portRESTORE_CONTEXT and vPortYieldISR.

Doing this our project: FreeRTOS + Lua 5.3.1 + Lwip runs.

Attached you have the modified port files. Probably all is not fine with our work. More tests are needed. We hope that this modifications will be useful for FreeRTOS team.

You must put “#define configUSE_FPU 1” in your FreeRTOSConfig.h file.

iberoxarxa wrote on Thursday, September 17, 2015:

isr stack must be 8 byte alignment. This is done putting this in port.c:

#if( configUSE_FPU == 1 )
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 8 ] );
#else
const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );
#endif

With this (and previous post) FreeRTOS inour project is stable. 3 hours running, responding to ping, and executing Lua scripts without any problem.

tlafleur wrote on Thursday, September 17, 2015:

Also, will you be posting your LUA project core?

~~ _/) _/) _/) ``` _/) ~~

On Sep 17, 2015, at 6:20 AM, Jaume Olivé Petrus iberoxarxa@users.sf.net wrote:

isr stack must be 8 byte alignment. This is done putting this in port.c:

if( configUSE_FPU == 1 )

const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 8 ] );

else

const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );

endif

With this (and previous post) FreeRTOS inour project is stable. 3 hours running, responding to ping, and executing Lua scripts without any problem.

portRestoreContext clobbers PIC32MZ EF Status register

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tlafleur wrote on Thursday, September 17, 2015:

You may want to consider using the pre define macro to wrap you changes

define __PIC32_FEATURE_SET “EF”

i~~ _/) _/) _/) ``` _/) ~~i

Tom Lafleur
(858) 759-9692

On Sep 17, 2015, at 2:26 AM, Jaume Olivé Petrus iberoxarxa@users.sf.net wrote:

From Iberoxarxa we got the first results with Lua 5.3.1 running on FreeRTOS on PIC32MZ2048EFH064. MZ ports have been modified to achieve this:

CP0 status is initialized in pxPortInitialiseStack. portINITIAL_SR is invalid for this silicon, because it sets CU1 to 0 disabling the FPU. It is mandatory to apply 0x20000000 mask to portINITIAL_SR for enabling FPU.

FPU registers are 64 bit wide. There are 32 registers ($f0 to $f31). This registers must saved and restore in portSAVE_CONTEXT, portRESTORE_CONTEXT and vPortYieldISR. For this use sdc1 / ldc1 MIPS instruction. Be careful with that, so sdc1 / ldc1 requires a 8 word alignment stack. Changes in pxPortInitialiseStack are required for this.

FPU has 4 control registers. Register FCSR must be saved / restored in portSAVE_CONTEXT, portRESTORE_CONTEXT and vPortYieldISR.

Doing this our project: FreeRTOS + Lua 5.3.1 + Lwip runs.

Attached you have the modified port files. Probably all is not fine with our work. More tests are needed. We hope that this modifications will be useful for FreeRTOS team.

You must put “#define configUSE_FPU 1” in your FreeRTOSConfig.h file.

Attachments:

ef-parts.zip (17.1 kB; application/zip)
portRestoreContext clobbers PIC32MZ EF Status register

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iberoxarxa wrote on Thursday, September 17, 2015:

Project will be release to general public before December 31, 2015.

pbjork wrote on Monday, September 21, 2015:

I have been informed by Microchip staff that PIC32MZ EF support for FreeRTOS should be included in the next MHC Harmony release, 1.0.7. Not sure of the release date nor that RTEL concurs, however.

rtel wrote on Monday, September 21, 2015:

Yes - concur with that. Hopefully we will be able to provide it as a
separate download prior to that.

Regards.