(PIC32) Crashing with reserved instruction exception?

Hi everyone, hitting a strange issue that I cant seem to figure out. Hope this isnt too arch specific…

I have created a basic application which is setting up a timer that will flash an LED once the device has “booted” and is running.

But when running my code, it ends up crashing with a reserved instruction exception, according to the CAUSE register.

The EPC register contains an address of 0x9D00803C, and when I look at this code in the disassembly I get a jump instruction:

9d00801c:	40026800 	mfc0	v0,c0_cause
9d008020:	afc20014 	sw	v0,20(s8)
9d008024:	8fc20014 	lw	v0,20(s8)
9d008028:	34420100 	ori	v0,v0,0x100
9d00802c:	afc20014 	sw	v0,20(s8)
9d008030:	8fc20014 	lw	v0,20(s8)
9d008034:	40826800 	mtc0	v0,c0_cause
9d008038:	000000c0 	ehb

9d00803c <.LBE2>:
9d00803c:	0b402013 	j	9d00804c <.LVL84>
9d008040:	00000000 	nop
                ( void ) xTaskResumeAll();
9d008044:	0f4011f3 	jal	9d0047cc <xTaskResumeAll>
9d008048:	00000000 	nop

Im using kernel 10.4.1, and the above code would seem to correspond to https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/V10.4.1-kernel-only/timers.c#L633

Im seeing a little bit of conflicting information about the EPC register, some sources say that it is the return address (i.e. where execution would resume from), and other sources seem to imply that it will hold the address of the instruction that caused the exception (or the address of the JUMP instruction if the exception happened in the branch slot).

I think it is related to the EHB instruction, because if I add a NOP after EHB and before the JUMP, the EPC address changes to the NOP instruction.

Wondering if anyone could provide any pointers where I should look or things I should try to resolve this?


Ok, it probably is a bit arch specific. :upside_down_face:

I found an answer (should have waited a few more minutes before posting!)

Turns out you need to enable multi-vectored interrupts or EHB causes a RI exception…


My very favorite kind :wink:

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