On switching back and forth between Thumb mode and ARM mode there is a potential stack issue. I’m attempting to narrow it down further but have a question of the FreeRTOS port for the ARM7. Can FreeRTOS port run purely in ARM mode for the AT91SAM7xxxx cores? This would help the debug effort such that i can rule out the ARM to Thumb back to ARM switching (if it is in fact not the issue).
I am using the ARM7_AT91SAM7X256_Eclipse FreeRTOS demo as my base. And using the Yagarto tool chain as the compiler/linker etc.
The driver i’m debugging is using the SSC port on the AT91SAM7SE256 (similar to the AT91SAM7 in the port). It is DMA’ing a set piece of data over and over and approximately after 2000 transmissions is when the data becomes corrupted (looking both on an oscope and the data copied into the buffer prior to transmission via DMA. I can tell it’s the ~2000th piece of data due to count value i have in the data being transmitted.
If i get the system to build purely in ARM mode i would rerun these tests to see if it something related with the SSC and DMA. So just to reiterate the question, can FreeRTOS port run purely in ARM mode for the AT91SAM7xxxx cores?