bones23 wrote on Tuesday, January 08, 2008:
sure, below is my serial code. The scheduler code is from the freeRTOS v4.6.
//uart configuration
xComPortHandle xSerialPortInitMedium( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength, int comNum )
{
xComPortHandle xReturn;
UART_InitTypeDef xUARTx_Init;
GPIO_InitTypeDef GPIO_InitStructure;
xSemaphoreHandle semiphorTest;
xQueueHandle xRxedChartest;
UART_TypeDef* UARTx;
switch(comNum){
case 0:
UARTx = UART0;
break;
case 1:
UARTx = UART1;
break;
case 2:
UARTx = UART2;
break;
}
switch(comNum){
case 0:
xReturn = &COM0;
break;
case 1:
xReturn = &COM1;
break;
case 2:
xReturn = &COM2;
break;
}
switch(comNum){
case 0:
xRxedChars0 = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xRxedChartest = xRxedChars0;
vSemaphoreCreateBinary( xTxFIFOSemaphore0 );
semiphorTest = xTxFIFOSemaphore0;
break;
case 1:
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xRxedChartest = xRxedChars;
vSemaphoreCreateBinary( xTxFIFOSemaphore );
semiphorTest = xTxFIFOSemaphore;
break;
case 2:
xRxedChars2 = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
xRxedChartest = xRxedChars2;
vSemaphoreCreateBinary( xTxFIFOSemaphore2 );
semiphorTest = xTxFIFOSemaphore2;
break;
}
/* If the queue/semaphore was created correctly then setup the serial port
hardware. */
if( ( xRxedChartest != serINVALID_QUEUE ) && ( semiphorTest != serINVALID_QUEUE ) )
{
/* Pre take the semaphore so a task will block if it tries to access
it. */
switch(comNum){
case 0:
xSemaphoreTake( xTxFIFOSemaphore0, 0 );
break;
case 1:
xSemaphoreTake( xTxFIFOSemaphore, 0 );
break;
case 2:
xSemaphoreTake( xTxFIFOSemaphore2, 0 );
break;
}
/* Configure the UART. */
xUARTx_Init.UART_WordLength = UART_WordLength_8D;
xUARTx_Init.UART_StopBits = UART_StopBits_1;
xUARTx_Init.UART_Parity = UART_Parity_No;
xUARTx_Init.UART_BaudRate = ulWantedBaud;
xUARTx_Init.UART_HardwareFlowControl = UART_HardwareFlowControl_None;
xUARTx_Init.UART_Mode = UART_Mode_Tx_Rx;
xUARTx_Init.UART_FIFO = UART_FIFO_Enable;
/* Enable the UARTx Clock */
switch(comNum){
case 0:
SCU_APBPeriphClockConfig( __UART0, ENABLE );
break;
case 1:
SCU_APBPeriphClockConfig( __UART1, ENABLE );
break;
case 2:
SCU_APBPeriphClockConfig( __UART2, ENABLE );
break;
}
portENTER_CRITICAL();
{
/* Configure the UART itself. */
UART_DeInit( UARTx );
UART_Init( UARTx, &xUARTx_Init );
UART_ITConfig( UARTx, UART_IT_Receive | UART_IT_Transmit, ENABLE );
UARTx->ICR = serCLEAR_ALL_INTERRUPTS;
UART_LoopBackConfig( UARTx, DISABLE );
switch(comNum){
case 0:
UART_IrDACmd( IrDA0, DISABLE );
VIC_Config( UART0_ITLine, VIC_IRQ, 9 );
VIC_ITCmd( UART0_ITLine, ENABLE );
break;
case 1:
UART_IrDACmd( IrDA1, DISABLE );
VIC_Config( UART1_ITLine, VIC_IRQ, 9 );
VIC_ITCmd( UART1_ITLine, ENABLE );
break;
case 2:
UART_IrDACmd( IrDA2, DISABLE );
VIC_Config( UART2_ITLine, VIC_IRQ, 9 );
VIC_ITCmd( UART2_ITLine, ENABLE );
break;
}
UART_Cmd( UARTx, ENABLE );
lTaskWaiting = pdFALSE;
}
portEXIT_CRITICAL();
}
else
{
xReturn = ( xComPortHandle ) 0;
}
/* This demo file only supports a single port but we have to return
something to comply with the standard demo header file. */
return xReturn;
}
//the string print function
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
{
signed portCHAR *pxNext;
int lengthCount = 0;
int j;
/* A couple of parameters that this port does not use. */
//( void ) usStringLength;
/* NOTE: This implementation does not handle the queue being full as no
block time is used! */
/* Send each character in the string, one at a time. */
pxNext = ( signed portCHAR * ) pcString;
while( lengthCount < usStringLength )
{
for(j=10000; j>0; j–);
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
pxNext++;
lengthCount += 1;
}
}
//print char function
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
{
portBASE_TYPE xReturn;
UART_TypeDef* UARTx;
xQueueHandle xTxFiFoSem;
int j;
switch(pxPort->portNum)
{
case 0:
xTxFiFoSem = xTxFIFOSemaphore0;
UARTx = UART0;
break;
case 1:
xTxFiFoSem = xTxFIFOSemaphore;
UARTx = UART1;
break;
case 2:
xTxFiFoSem = xTxFIFOSemaphore2;
UARTx = UART2;
break;
}
/* Can we write to the FIFO? */
if( UARTx->FR & serTX_FIFO_FULL )
{
/* Wait for the interrupt letting us know there is space on the
FIFO. It is ok to block in a critical section, interrupts will be
enabled for other tasks once we force a switch. */
lTaskWaiting = pdTRUE;
/* Just to be a bit different this driver uses a semaphore to
block the sending task when the FIFO is full. The standard COMTest
task assumes a queue of adequate length exists so does not use
a block time. For this demo the block time is therefore hard
coded. */
xReturn = xSemaphoreTake( xTxFiFoSem, serTX_BLOCK_TIME );
if( xReturn )
{
UARTx->DR = cOutChar;
}
}
else
{
for(j=5000; j>0; j–);
portENTER_CRITICAL();
//printf("%d", UARTx->FR);
UARTx->DR = cOutChar;
//printf("%d ", UARTx->FR);
xReturn = pdPASS;
portEXIT_CRITICAL();
}
return xReturn;
}