Brief system description: We use the ZCU106 evaluation kit and the included ZU7EV device is equipped with a quad-core Arm® Cortex®-A53 application processor (the A53 is running in a Linux environment), an ARM Cortex R50 processor is runs in the FreeRTOS environment and an ARM Cortex R51 bare metal processor.
We are having a major problem dealing with 2 mailboxes, A53 R50 and A53 R51:
The system speed is 148.5 MHz
The threshold for MAILBOX R50 RIT is 4096x32bit = 16Kbytes.
The problem is that after a certain period (variable time) we have an indication that the FIFO on the R50 side is full and R50 cannot write new data - this means that A53 did not read new data from the FIFO buffer in time. Register Mailbox Status Send Status = 11 - FIFO Full.
It should be noted that A53 works at the same time (in parallel) with 2 mailboxes with both R51 and R50 and there are also additional processes in A53.
Any idea why after a certain time it is stuck? Is anyone else experiencing the same issue??