On LPC21xx ( I use LPC2138 with GCC), the timers functions, 4xCAP and 4xMAT share a unique ISR. In my application I use all CAP and MAT functions generating ints. Using Preemptive scheduler is ok, I implemented my ISR as recommended by the documentation:
timer0_isr(); /* contain tick, CAP and MAT handling */
portRESTORE_CONTEXT();
}
Now the part I not really understand how to implement. To use the non preemptive scheduler, no call to portSAVE_CONTEXT and portRESTORE_CONTEXT must be done in ISR. At that point, how can I implement the ISR if I need both non preemptive scheduler on MAT (periodic timer) and calls to kernel functions in others part of ISR, thus saving and restoring context.
Demo codes are not helpfull as ISR only handle Tick.
If I understand your question correctly, you are wanting to share the interrupt for all the interrupt sources, and cause a context switch from some sources but not others.
I think you can keep the interrupt entry point exactly as it is now. Saving and restoring the context does not cause a context switch in itself - a context switch will only occur if vTaskSwitchContext() is called between the save and restore macros.
To convert to use the cooperative scheduler simply call vTaskIncrementTick() for the tick interrupt - without a call to vTaskSwitchContext().
On LPC21xx, timers have multiple functions, Input capture, output compare and PWM. Each function can generate several interrupts but there is only one ISR per timer. So the ISR must first check wich function generate the int.
The LPC2106 confused me with the different declaration about "IRQ" or "NAKED" ISR, with or without SAVE/RESTORE context.
In my timer0_isr routine, in the part wich take care of the tick, I wrote the following code