vicui wrote on Monday, October 07, 2013:
All:
void aaa(void)
{
int data[8];
bbb(data);
...
}
my task call some code like above. data buffer is set in bbb function, but data[0] change afer bbb function return. the issue happens afer running many hours. I try to extend task stack size and system stack size, but still happen. at that time, no task switch but probaly interrupt coming in. CORTEX M3 save contex by HW. anyone meet the same issue ?
vincent
rtel wrote on Monday, October 07, 2013:
Have you been through the items here: http://www.freertos.org/FAQHelp.html and as you are using a Cortex-M also here: http://www.freertos.org/RTOS-Cortex-M3-M4.html
Are you using FreeRTOS V7.5.2? If so defining configASSERT() will trap many of the common errors described on the Cortex-M specific link above.
Regards.
vicui wrote on Wednesday, October 09, 2013:
I always use FreeRTOS v7.5.2 and enable configASSERT(), when the issue happen, there is no any ASSERT happens. the interrupt priority follows above link completely . Is there any idea ?
rtel wrote on Wednesday, October 09, 2013:
Do your debug tools allow you to set watchpoints on data being written to? If so, place a break point the byte that is getting overwritten so the debugger stops when the value changes and you can see what was written to it. The problem will either be a misconfiguration (but if the recommendations on the above links are being followed that is less likely) or an simple application error.
Regards.
vicui wrote on Wednesday, October 09, 2013:
Sorry, I need to buy the emulator!
I post my interrupt configure as following
#define configKERNEL_INTERRUPT_PRIORITY 255
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191
#define configLIBRARY_KERNEL_INTERRUPT_PRIORITY 15
and initialize interrupt NVIC as following
static void RS485_NVIC_Config(void)
{
NVIC_SetPriority( USART1_IRQn, configLIBRARY_KERNEL_INTERRUPT_PRIORITY );
NVIC_EnableIRQ( USART1_IRQn );
}
containly, there are other many interrupt in system.
compared to old code, I only add a 485 receive semaphore in receiving 485 packet.
rs485_rx_semaphore = xSemaphoreCreateCounting(8, 0);
only it receive correct packet by interrupt, it will call xSemaphoreGiveFromISR( rs485_rx_semaphore, &xHigherPriorityTaskWoken );
Is it possible that the code cause the issue ?
Vincent
davedoors wrote on Wednesday, October 09, 2013:
If the 15 is right or not depends on the chip you are using. Which is it?
vicui wrote on Wednesday, October 09, 2013:
Cortex M3
rtel wrote on Wednesday, October 09, 2013:
Yes - you mentioned that already. Dave’s question is related to the fact that different Cortex-M3 implementations have a different number of priority bits, and that effects the setting of configLIBRARY_KERNEL_INTERRUPT_PRI (I think this was explained on the web page you are already been referenced to).
So which Cortex-M3 device family are you using? For example, is it an STM32F, LPC17xx, LM3Snnn, etc.
Regards.
vicui wrote on Wednesday, October 09, 2013:
STM32F2X7
vicui wrote on Wednesday, October 16, 2013:
I trace the issue and find some strange case which may be related with interrupt mixxing.
in my SLIP protocol, DB and DD BYTES are used to represent DB (DB data byte will appear as DBDD), but the a changeed data including DD BYTE. it seems that SLIP response data is not synchronize with current SLIP commands.
static uint8_t rs485_rx_routine(void)
{
uint8_t ret = SLIP_OK;
if (xSemaphoreTake( rs485_rx_semaphore, 50) != pdTRUE)
{
ret = SLIP_TIMEOUT;
}
rs485_rx_count = 0;
return ret;
}
my 485 rx handle wait 50ms to take the samephore . and the samephore is counting and initialized as rs485_rx_semaphore = xSemaphoreCreateCounting(8, 0);
which release in 485 interrupt handle
void USART1_IRQHandler(void)
{
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
if (USART_GetFlagStatus(USART1, USART_FLAG_ORE) == SET)
{
USART_ClearFlag(USART1,USART_FLAG_ORE);
USART_ReceiveData(USART1);
}
if(USART_GetITStatus(USART1, USART_IT_RXNE) == SET)
{
uint8_t tmp = 0;
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
tmp = (USART_ReceiveData(USART1) & 0xFF);
slipcmdrspbuffer[rs485_rx_count++] = tmp;
if (rs485_rx_count >= SLIP_CMDRSP_BUF_SIZE)
{
slipcmdrspbuffer[2] = SLIP_NACK;
cmdrsppacketsize = 5;
xSemaphoreGiveFromISR( rs485_rx_semaphore, &xHigherPriorityTaskWoken );
}
else if (rs485_rx_count == 1)
{
if (tmp != SLIP_START)
{
rs485_rx_count = 0;
}
}
else if((rs485_rx_count < SLIP_ACKNACK_PACKET_SIZE) && (rs485_rx_count > 1))
{
if (tmp == SLIP_START)
{
rs485_rx_count = 0;
slipcmdrspbuffer[rs485_rx_count++] = tmp;
}
}
else if(rs485_rx_count == SLIP_ACKNACK_PACKET_SIZE)
{
if (slipcmdrspbuffer[2] == SLIP_NACK)
{
cmdrsppacketsize = rs485_rx_count;
xSemaphoreGiveFromISR( rs485_rx_semaphore, &xHigherPriorityTaskWoken );
}
}
else if (rs485_rx_count > (SLIP_ACKNACK_PACKET_SIZE + 1))
{
if (slipcmdrspbuffer[rs485_rx_count - 1] == SLIP_END)
{
cmdrsppacketsize = rs485_rx_count;
xSemaphoreGiveFromISR( rs485_rx_semaphore, &xHigherPriorityTaskWoken );
}
}
}
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
meanwhile, I also use the 485 channel to get other sensor’s data. and I use rs485_sem_wait(); and rs485_sem_signal(); to protect the 485 channle in used.
Is there a possible that system get the last SLIP command response data after issue new SLIP command?
vicui wrote on Wednesday, October 23, 2013:
Rechard:
I find the root cause now , once the issue happen, device accept 2 ACK data in slip reponse data, this also meet SLIP protocol in format. I don’t verify the second ACK. now, only check the data integerity and filter this time. the issue disappear !
thank you for your help
vincent