I am using the STM3210E_eval (the new Rev. with MPU) and the Sourcery GCC compiler. (FreeRTOS 7.0.0 and StdPeriph Lib 3.5)
Thanks to the examples on stf12.org setting up FreeRtos without MPU was easy and worked great. However I am now trying to get the MPU-Port running.
I took the code from the “CORTEX_MPU_LPC1768_GCC_RedSuite” example and adjusted FreeRTOS.h, the adresses in the main code and the LCD routines for the STM32F103. Compiles just fine.
The problem is the Linker Script. “Placeholders” like
c:/programme/codesourcery/sourcery g++ lite/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/bin/ld.exe: FreeRtos_MPU-LPC_Example.elf section `.text' will not fit in region `FLASH'
c:/programme/codesourcery/sourcery g++ lite/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/bin/ld.exe: region `FLASH' overflowed by 133201600 bytes
If you set the flash to 1000M look at the listfile you will see a gap of the size of 0x8004000. No code in between.
Does anyone have a working Linker Script for the STM32 family and the MPU-port?
Or an explanation for the behavior?
I faced exactly the same strange problem when adapted STM32 CMSIS linker script from this one. Solved by moving problematic line out of .text {} block an placing it just before block. But original script in example project works fine howewer. Looks like bug in linker.
Oops. Not solved, just seemed as solved. Placeholder moved out from .text block actually does nothing ! It doesn’t rewinds location. I wasted two days trying to get FreeRTOS MPU working until I found reason. But now I don’t know how to fix it !
I expect that codeline
just rewinds current location to specified value and subsequent .text section will start being placed from this point. But it results in such linker map:
It recognizes resulted address as size and makes zero-filled region with this size ! It is crazy ???
(Official CORTEX_MPU_LPC1768_GCC_RedSuite luckily works only because flash address origin starts with just small 0x0. It results in small memory waste and little misalignment between actual data placement and defined regions.)