Interrupt during context switch

Kernel
1

nobody wrote on Tuesday, September 12, 2006:

Hi

I’m developing a small communication device with Atmel AVR ATMega 2560. I use as IAR C compiler as development tool.

In my application I have very strict timing restrictions during serial communication, so I need that USART interrupt have to be ALLWAYS active.

Unfortunately RTOS during context switch disable interrut. This cause in my application lost or Rxed bytes or many jitter on Txed bytes.

It’s possible to keep interrupt active during context switch ?

Someone can help me and give me some directions about this issue ?

Thank you in advice

2

nobody wrote on Tuesday, September 12, 2006:

You can re-enable interrupts within an ISR once the context is saved provided that you keep a count of the interrupt nesting depth, and only restore a context once the nesting depth is zero again.  You will have to disable interrupts again while you restore the context.

Consider other options first - like using FIFOs, organizing your ISR to trigger a high priority task to handle the data with interrupts enabled, etc.

3

nobody wrote on Tuesday, September 12, 2006:

If you are not using the isr to wake blocked tasks you can also speed things up by using a simple circular buffer instead of queues/semaphores.  You still need to keep a count of the interrupt nesting depth but don’t need to save and restore the context which will speed things up a lot.  You can renable interrupt immediately after incrementing the nesting depth, then disable again immediately before decrementing the nesting depth.

4

nobody wrote on Tuesday, September 12, 2006:

The AVR port does not save the context until a switch is actually required.  You can enable interrupts prior to this point provided the interrupt source is cleared first.  Disable again for the switch.