Intercore comms, one core running FreeRTOS, one baremetal

Kernel
1

Hi. I’m trying to come up with a robust design for inter-core communications and have a question that I haven’t seen asked or answered yet here.

I found multiple sources both in the official documentation as well as threads here suggesting that I could use stream buffers or message buffers for safe communications between two processor cores via shared memory, provided that there is only a single reader and a single writer.

My situation is that I have a dual core processor, with one core running FreeRTOS and the other running on bare metal in a super loop with a dispatcher.

The question that I have is, can I still use stream buffers and/or message buffers for communications with that other core, provided the following:

  1. Ensure that the buffers are initialized before the non-RTOS core accesses them.
  2. For code calling from the non-RTOS core, modify the code to ensure that there are no kernel calls. This will be simplified somewhat, since I’m not planning to do anything other than send/receive, with a timeout that is always 0.

Will this work, or am I better off implementing an asymmetric multiprocessing architecture? I should note that the MCU vendor does not have good support for AMP, so this would not be a trivial undertaking.

Aside from the above, are there any other strategies worth considering?

Thanks.

2

That should work. The stream buffer is basically a lockless circular buffer - provided you take out the bits that are going to put the caller to sleep, or attempt to unblock it, it should work.

3

My first comment is what you are describing IS an “Asymmetric Multiprocessing Architecture” as the two processors are running different system (FreeRTOS and BareMetal).