When an ISR does something which logically unblocks a new task (giving a binary semaphore, putting something in a queue), we want to yield. Dumb question perhaps: why not just simulate a timer interrupt ? This would get back to the scheduler quickly and cleanly after the ISR returns. This would mess up anything using the timer for stable timing without some addition work (accumulate partial timer values in the timer ISR and adjust the tick count accordingly), but that’s not hard. Might make things simpler ? Still doesn’t allow an ISR to mess with queues while running at a higher priority than FreeRTOS. Thoughts ?
Each port does this in a slightly different way. Faking timer interrupts is not possible on all platforms, and would get complex as you would have to know which was a fake interrupt (so only a context switch was performed) and which was a real interrupt requiring the tick to be incremented and a context switch to be performed - the complexity comes when both things happen simultaneously.
Thanks for the concise explanation. I added a fake interrupt to a distinct (non-timer) ISR at priority 1; high-priority ISR can force reschedule by triggering the fake interrupt. Seems nice and clean, on PIC24F anyway.
Thanks again !
Best Regards, Dave