HCS12 timing

imajeff wrote on Wednesday, October 26, 2005:

I’m working more on the GCC/HCS12 port for MC9S12DP256. I think I’ve got the port ready to run the full demo as it works in the official CodeWarrior/HCS12 (banked) port. I have some questions about serial.

I have been testing with my own application which sends wireless packets through SCI at 9600 (actually 9615) baud. I am losing sync when reading the packets only when running with the RTOS.

I wonder if it is taking very long to switch tasks. Any Idea how long that takes in the CodeWarrior/HCS12 FreeRTOS port?

rtel wrote on Wednesday, October 26, 2005:

Naturally the RTOS will add an overhead to some extent.  Conversely it can also be used to reduce the amount of time interrupts are disabled within your driver.

9600 baud should not be a problem, but is dependent on what else your application is doing.

Here are a couple of threads that might be of help:



imajeff wrote on Wednesday, October 26, 2005:

K, but one thing I’m certain of is that this GCC port will generate less optimized code, therefore taking longer than CW for the task swap. I have it ticking about 1 KHz. Perhaps I’ll scope it to find out what percent of that is typically the switch.

I am not using an interrupt, just to test this. I admit I haven’t put a check in there yet to see if the SCI input is overflowing, just guessing that’s happening :slight_smile:

It’s hard with this GCC because I don’t have a source level debugger going yet.

nobody wrote on Wednesday, October 26, 2005:

The saving and restoring of registers context is asm code so will be the same between cw and gcc.  The switch C functions will be different but these are very small so hopefully not too different.

imajeff wrote on Wednesday, October 26, 2005:

I know… I wrote it.  I’m talking about the scheduler code which is C.

imajeff wrote on Thursday, December 01, 2005:

I found that the timing wasn’t a significant problem durring task swapping.

Scope time for various task swaps in micro seconds:
37, 12, 8

FreeRTOS tick interrupt looks steady at 1024 uS.