Hardware port for CORTEX_A53_64-BIT_TI_AM64_SMP demo project for FreeRTOSv11

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1

Hi,
I’ve ported the CORTEX_A53_64-BIT_TI_AM64_SMP demo to FreeRTOSv11 but I keep getting exceptions when running it.
I suspect I did something wrong with the critical sections in the hardware port, so if someone can point me in the right direction I would appreciate it.
I’ve tried numerous implementations of the missing defines and my current iteration is:

#define portENTER_CRITICAL_FROM_ISR() vTaskEnterCriticalFromISR()
#define portEXIT_CRITICAL_FROM_ISR( x ) vTaskExitCriticalFromISR( x )

#define portSET_INTERRUPT_MASK() ({
HwiP_disable();
})

#define portCLEAR_INTERRUPT_MASK(x) ({
HwiP_enable();
})

2

Hi Erik,
From the code you shared, it looks like the interrupt mask is not handled in the port. portSET_INTERRUPT_MASK() are supposed to return the interrupt mask, and portCLEAR_INTERRUPT_MASK( x ) are supposed to clear the interrupt mask returned by portSET_INTERRUPT_MASK(). You can reference TI documents for the implementation details.

1 Like
3

I have tried something like this in the past, but still received exceptions:
#define portSET_INTERRUPT_MASK() ({
uint64_t x = HwiP_disable();
vTaskEnterCritical();
x;
})

#define portCLEAR_INTERRUPT_MASK(x) ({
vTaskExitCritical();
HwiP_restore(x);
})

Should this work? If so, there must be something else wrong.

4

@erik.tamlin
Thank you for reporting this issue.
It looks like the partner supported CORTEX_A53_64-BIT_TI_AM64_SMP port and demo is not updated with FreeRTOS v11. We will contact our partner and update this port to migrate to FreeRTOS v11. Once we have any progress, we will update in this thread.
You can also take a look at this guide to migrate SMP branch port to FreeRTOS v11 and share us your modification and result. We would like to discuss with you in this thread.

5

This has already been mentioned in this post - TI Sitara SMP demo - #4 by Anoop.