Hi,
I used the example on this page which shows some handy assembly for debugging hard faults on ARM Cortex-M devices. I have this placed in a cpp file, and the code looks like this.
//The hard fault interrupt is configured to call this
extern "C" void HardFaultHandler() __attribute__ (( naked ));
extern "C" void HardFaultHandler(){
__asm volatile
(
" tst lr, #4\n"
" ite eq\n"
" mrseq r0, msp\n"
" mrsne r0, psp\n"
" ldr r1, [r0, #24]\n"
" ldr r2, hard_fault_handler_address_const\n"
" bx r2\n"
" hard_fault_handler_address_const: .word HardFaultCrash"
);
}
extern "C" void HardFaultCrash(uint32_t* sp_addr){
CrashStart();
CrashPrint("Hard fault at "); CrashPrintHex32(sp_addr[6]); CrashPrint("\r\n");
CrashPrintFaultRegisters();
CrashFinish();
}
This seems to work, but when I compile it, an intermediately assembly file outputs the following assembler warning:
C:\Users\user\AppData\Local\Temp\ccM7txKR.s:1619: Warning: section does not have enough alignment to ensure safe PC-relative loads
It seems to be referring to the branch instruction. Iām using ARM GCC, is there a attribute or some other way I can use to assure alignment?
Thank you