jimbuteau wrote on Wednesday, June 13, 2018:
soc: XC7Z020 with dual cortexA9 (Trenz TE0720)
sdk: 2017.2
os: FreeRTOS 9.0
interrupt driver: scugic_v3_7
My system is running well (single core) with several interrupts but without interrupt nesting (pre-emption). My two highest priority interrupts are running at priority 18 (TTC) and 19 (axidma). I would very much like nested interrupt handling to work so that the timer interrupt could pre-empt the dma interrupt (as well as all the other lower priority interrupts).
In searching for a solution the closest I’ve come is from 2014: https://www.xilinx.com/support/answers/54128.html
Unfortunately this solution does not work for me and leads to problems.
First of all, the addition of the following line (as instructed):
XScuGic_CPUWriteReg(InstancePtr, XSCUGIC_BIN_PT_OFFSET, 0x03);
results in an ASSERT fail at:
portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
Secondly, if I skip the XSCUGIC_BIN_PT_OFFSET write and just insert the two functions, Xil_EnableNestInterrupts() and Xil_DisableNestInterrupts() in my interrupt handler(s) as instructed my program crashes at taskEXIT_CRITICAL() in xTaskResumeAll() after the very first interrupt handler call.
Note the the scugic driver html doc contains the comment: Nested interrupts are not supported by this driver
Am I going about this the right way? I would VERY MUCH like to have this feature working and would greatly appreciate any help at all.