FreeRTOS SMP Support


I’ve seen the work done for SMP support under github → FreeRTOS-Kernel → smp branch (unable to add the actual link)
What is the status of the code? is it still WIP? is there a POC for questions? I would like to contribute to this project, is there such an option?

We are interested in using FreeRTOS SMP with RISCV cores.


Hi Ronen - thanks for your interest. We are consolidating a few slightly different production SMP versions of FreeRTOS, specifically from Espressif and XMOS, and porting the result to new architectures. The intent is to then develop the scheduling algorithms a bit further. So while both starting code bases are in production, I think it would be accurate to say the consolidated version is still a work in progress in so far as differences in naming and testing may still be in a bit of flux.

Are you able to provide more information on your intended RISC-V target?

Hi Richard,

Thanks for the reply.
WDC has its own in-house versions of RISCV cores and I was assigned to have FreeRTOS SMP running on the multihart version.
Since there is no official FreeRTOS SMP release I need to implement it so it is generic enough. Espressif and XMOS don’t fully support what I need e.g. core affinity (not supported in XMOS) and number of cores > 2 (not supported by Espressif).
Is it possible to share the consolidated version?
It would be great if I could step in and help with the development.


The consolidated version is available as the branch in the primary repo. We welcome any contributions that you can provide. Richard was just providing fair warning that the SMP branch is still changing so any porting work you perform should be considered a work in progress.

On the topic of Affinity, the SMP port does have it in the form of two functions

void vTaskCoreExclusionSet( const TaskHandle_t xTask, UBaseType_t uxCoreExclude );
UBaseType_t vTaskCoreExclusionGet( const TaskHandle_t xTask );`

We are still making changes in this area so these functions will change.

Thanks for the clarification

Just for some clarification for others who are interested in SMP things.
The current SMP kernel uses an exclusion mask to prevent a task from executing on a core. This allows a task to run on cores 0,1,2 but not 3 if that was important to your application.
There are two use-cases for this feature.

  1. A specific core may have access to some HW that the task requires. That puts a HW dependency upon the task forcing it to require a core.
  2. Many applications use task priority and understand that high priority tasks ALWAYS run before low priority tasks. But, in a 2 core system with 2 tasks (high,low priority) it is possible for BOTH a high priority AND a low priority task to be executing at the same time. Of course suitable mutexes can be used to synchronize these tasks, but in the past, many applications just used the priority to eliminate the need to synchronize. Forcing all tasks that are dependent upon specific priority onto a single core will fix the issue.

I can state with some confidence that the details of affinity/exclusion for SMP FreeRTOS are not finalized. We are concerned with the details of legacy applications, priority, and core affinity. There is also a large amount of legacy code with ESP32S2 which uses affinity to manage access to its 2 cores. The issues of managing 2 cores (ESP32, Pi PICO) vs 8 cores (XMOS) bring a few new challenges to FreeRTOS.

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I’m going through the FreeRTOS-Kernel SMP branch in git (the raspberry pi port specifically). I don’t see the portYIELD_CORE(a) macro defined in the portmacro.h of rpi-pico. And also the xPortStartScheduler() in port.c doesn’t seem to start the scheduler on all cores.
Is the rpi-pico port fully implemented and tested! And are there any other ports that are tested?

The Pi PICO port in the SMP branch does NOT support SMP just yet. We were just getting the PICO into the build and testing some of the HW spinlock features needed for SMP. I am reviewing work that does provide an SMP preview and I apologize for not finishing yet.

Hi Joseph,
No problem. Thanks for your reply. What about the XCore ports? I don’t see a definition for few functions like vPortStartSMPScheduler() in xPortStartScheduler() and the definitions of spinlock macros (rtos_lock_acquire() and rtos_lock_release()). Where can I get the sources for that?

The XMOS port is in the SMP branch of the FreeRTOS-Kernel repo.
It is working pretty well on my bench where I have been testing with up to 8 cores active at once.

The rtos_xxx functions are present in the tool chains from XMOS so be sure to download version 15 to get started.

ok sure, will check it out.

Is that still the case at this point?

No. SMP is supported.

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Simply set the core count to 2 and the PICO port will use both cores.

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